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Power current modeling of cryptographic VLSI circuits for analysis of side channel attacks

机译：加密VLSI电路的电源电流建模，用于分析边信道攻击

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Side channel attack (SCA) requires millions of dynamic power current waveforms in cryptographic VLSI circuits. The capacitor charging modeling captures the time evolution of logical activities in the cryptographic operation of an Advanced Encryption Standard (AES) core and efficiently represents the amount of charges consumed during operation. This approach significantly reduces the complexity of power current simulation, and accomplishes acceleration by a factor of 220 or larger over the traditional transistor-level circuit simulation. The correlated power analysis (CPA) attack against AES cores is successfully simulated with a conventional SPICE simulator, with the models individually derived for 10,000 different cipher texts. The simulation-based SCA efficiently evaluates the vulnerability of AES cores in a variety of logical realizations as well as in different technology nodes.
机译：旁通道攻击（SCA）需要在加密VLSI电路中使用数百万个动态功率电流波形。电容器充电建模可捕获高级加密标准（AES）内核的加密操作中逻辑活动的时间演变，并有效表示操作期间消耗的电荷量。这种方法大大降低了电源电流仿真的复杂性，并且与传统的晶体管级电路仿真相比，可实现220倍或更大的加速。使用常规的SPICE仿真器成功模拟了针对AES内核的相关功率分析（CPA）攻击，并针对10,000个不同的密文分别导出了模型。基于仿真的SCA可有效评估AES内核在各种逻辑实现以及不同技术节点中的脆弱性。

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