• 主题
高级搜索  >
历史搜索 清空历史
首页> 外文会议>International Conference on Computer Communication and Informatics >Area Efficient Architecture for high speed wide data adders in Xilinx FPGAs
【24h】

Area Efficient Architecture for high speed wide data adders in Xilinx FPGAs

机译：Xilinx FPGA中的高速宽数据加载剂的区域高效架构

获取原文
页面导航
  • 摘要
  • 著录项
  • 相似文献
  • 相关主题

摘要

Modern FPGA families have inbuilt, fast and dedicated carry chain logic embedded in the configurable logic blocks which improves the performance of adder circuitry. In this paper we propose a fast and area efficient adder for Xilinx FPGA families by efficiently utilizing the 6-input LUTs and inbuilt dedicated carry logic chain. The proposed adder is implemented by splitting the N-bit adder into three sections where the first section consists of K/2 carry compression (cc) cells which calculates the carry of K least significant bits and this carry out is given as the carry input to calculate the sum of M most significant bits. The second section consists of K/2 sum-out (so) cells which calculates the sum of k least significant bits and the third section consists of M carry select adder (csa) cells instead of M ripple carry adder for calculating the sum of M most significant bits which in turn reduces the delay without any increase in area. The result shows that the proposed adder architecture with carry select adder and carry chain is faster than the one with normal ripple carry adder without any area overhead. The proposed N-bit adder improves the delay by about 16% (32-bit) to 29% (128-bit) compared to the state-of-the-art N-bit adder [8] and a normal adder respectively.
机译：现代FPGA系列内置，快速，专用的携带链逻辑嵌入在可配置的逻辑块中，提高了加法器电路的性能。在本文中，我们通过有效利用6输入LUT和内置专用携带逻辑链来提出Xilinx FPGA家族的快速和区域高效加法器。所提出的加法器通过将n比特加法器分成三个部分来实现，其中第一部分由计算k / 2携带压缩（Cc）单元来计算，该细胞计算k最低有效位的携带，并且作为携带输入给出这种执行计算M最高有效位的总和。第二部分由k / 2 sum-out（SO）小区组成，该单元计算k最低有效位和第三部分由M携带选择加法器（CSA）单元而不是M纹波，用于计算M的总和最重要的位，反过来减少了延迟而没有面积增加。结果表明，具有携带选择加法器的提出的加法器架构和载链的架构比具有正常波纹的速度快，而没有任何区域开销。与最先进的N位加法器[8]和正常加法相比，所提出的N比特加法器将延迟提高约16％（32位）至29％（128位）。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱：kefu@zhangqiaokeyan.com

京公网安备：11010802029741号 ICP备案号：京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有

  • 客服微信

  • 服务号