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首页> 外文会议>ASME international mechanical engineering congress and exposition >IMPROVEMENT OF MECHANICAL RELIABILITY OF 3D ELECTRONIC PACKAGING BY CONTROLLING THE MECHANICAL PROPERTIES OF ELECTROPLATED MATERIALS
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IMPROVEMENT OF MECHANICAL RELIABILITY OF 3D ELECTRONIC PACKAGING BY CONTROLLING THE MECHANICAL PROPERTIES OF ELECTROPLATED MATERIALS

机译：通过控制电镀材料的机械性能来改善3D电子封装的机械可靠性

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Three-dimensional (3D) integration of silicon microelectronic devices improves the electronic functions of devices and minimizes packaging density drastically. A through-silicon via (TSV) structure is indispensable for maximizing the density of interconnections among the stacked silicon chips. However, since the TSV structure is surrounded by silicon, and there is large mismatch in materials properties between metallic materials used for the TSV structure and silicon, thermal stress is essentially generated around the TSV structure during their fabrication process and operating conditions. Recently, electroplated copper thin films have started to be applied to the interconnection material in the TSV structure because of its low electric resistivity and high thermal conductivity. However, the electrical resistivity of the electroplated copper thin films surrounded by SiO_2 was found to vary drastically comparing with those of the conventional bulk material. This was because that the electroplated copper thin films consisted of grains with low crystallinity and grain boundaries, in other words, abnormally high defect density. Thus, both the crystallinity and electrical properties of the TSV structure was investigated quantitatively by changing their electroplating conditions and thermal history after the electroplating. It was observed that many voids and hillocks appeared in the TSV structures depending on the electroplating conditions. It was also found that the stress-induced migration occurred after the high temperature annealing which was introduced for improving the crystallinity of the electroplated films. Therefore, it is very important to evaluate the crystallographic quality of the electroplated copper thin films after electroplating to assure both the mechanical and electrical properties of the films.
机译：硅微电子器件的三维（3D）集成改善了器件的电子功能，并极大地降低了封装密度。为了最大化堆叠的硅芯片之间的互连密度，硅通孔（TSV）结构是必不可少的。然而，由于TSV结构被硅包围，并且用于TSV结构的金属材料和硅之间的材料性质存在很大的不匹配，因此在其制造过程和操作条件期间，在TSV结构周围基本上产生了热应力。近来，由于其低电阻率和高导热率，已开始将电镀铜薄膜应用于TSV结构中的互连材料。然而，发现与常规的块状材料相比，被SiO 2包围的电镀铜薄膜的电阻率发生了巨大变化。这是因为电镀铜薄膜由具有低结晶度和晶界的晶粒组成，换言之，具有异常高的缺陷密度。因此，通过改变它们的电镀条件和电镀后的热历史，定量地研究了TSV结构的结晶度和电性能。观察到，取决于电镀条件，在TSV结构中出现许多空隙和小丘。还发现应力诱导的迁移发生在高温退火之后，该高温退火被引入以改善电镀膜的结晶度。因此，评估电镀后的电镀铜薄膜的晶体学质量以确保薄膜的机械性能和电气性能非常重要。

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