A Methodology for Automatic Hardware Synthesis of Multiplier-less Digital Filters with Prescribed Output Accuracy

机译：一种具有规定的输出精度的乘法器减少数字滤波器的自动硬件合成方法

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This paper proposes a methodology for automatic synthesis of digital filters to meet prescribed output accuracy. Given a given frequency domain specification and output accuracy, a multiplier-less digital filter with canonical signed digits (CSD) will fir

机译：本文提出了一种自动合成数字滤波器的方法，以满足规定的输出精度。给定给定的频域规范和输出准确性，乘法器较少的数字滤波器，带有规范签名的数字（CSD）将冷却

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《IEEE Asia Pacific Conference on Circuits and Systems》|2006年||共4页
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Chan S. C.; Tsui K. M.; Zhao S. H.;
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中图分类 TN4-53;
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digital filters; field programmable gate arrays; frequency-domain analysis; geometric programming; high level synthesis; logic design; VHDL codes; automatic hardware synthesis; canonical signed digits; digital intermediate frequency receiver; field programmable ga;

机译：数字过滤器;现场可编程门阵列;频域分析;几何编程;高级合成;逻辑设计;VHDL代码;自动硬件合成;规范签名数字;数字中频接收器;现场可编程GA;

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4. A Methodology for Automatic Hardware Synthesis of Multiplier-less Digital Filters with Prescribed Output Accuracy [C] . Chan, S. C., Tsui, Circuits and Systems, (APCCAS), 2006 IEEE Asia Pacific Conference on . 2006

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8. Automatic Digital Hardware Synthesis [R] . Ailes, J. W. 1990

机译：自动数字硬件综合

A Methodology for Automatic Hardware Synthesis of Multiplier-less Digital Filters with Prescribed Output Accuracy

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