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A multipath network-on-chip topology

机译：多径网络上的芯片拓扑

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Network-on-Chip (NoC) is a new on chip communication design system that replaced bus-based communication in System-on-Chip (SoC). It provides efficient and scalable communication among the IPs (Intellectual Properties) in a single chip. Mainly, it was introduced to fulfill the growing demand of electronics system which needs to integrate a large number of computational resources into a single chip with an aim to get high performances, And to get efficient performance, the interconnection network plays an important role in chip design. The network architecture or topology should be highly scalable so that it can incorporate a large number of IPs without degrading the performance. In this paper, we proposed a network topology that provides multiple path diversity and high degree of scalability. The architecture of the proposed topology is described along with a packet based adaptive routing algorithm. We simulated the network using an open source simulator named OMNeT++. The topology is tested for average latency, number of events that to be carried in the simulation using a packet based routing algorithm and has been compared with existing Fat tree topology.
机译：网络上网（NOC）是一种新的芯片通信设计系统，该设计系统替换了芯片系统（SOC）中的基于总线通信。它在单个芯片中提供IPS（智能属性）之间提供有效和可扩展的通信。主要是，介绍了符合电子系统不断增长的需求，需要将大量计算资源集成到单个芯片中，目的是获得高性能，并获得高效的性能，互连网络在芯片中起重要作用设计。网络架构或拓扑应该是高度可扩展的，以便它可以包含大量IP而不会降低性能。在本文中，我们提出了一种提供多种路径分集和高度可扩展性的网络拓扑。所提出的拓扑结构的架构以及基于分组的自适应路由算法描述。我们使用名为Omnet ++的开源模拟器模拟网络。拓扑测试用于使用基于分组的路由算法在模拟中进行的平均延迟，事件的数量，并与现有的脂肪树拓扑进行了比较。

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