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Low-profile and chip-scale RF FEM using Si-interposer technology

机译：使用Si-interposer技术的薄型和芯片级RF FEM

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摘要

In this paper, we have developed the smallest hybrid-IC RF FEM (front-end module) using the thin-film integration and embedded-IC technology. All kinds of passive devices are integrated on a silicon substrate using a standard thin film process and active devices are embedded in cavities of the silicon substrate. An organic lamination process is used to fill a gap between the silicon and embedded IC. The signal via on the laminated organic is made using an UV laser machine. The RF FEM is consisted of three active ICs, PA, LNA, and SPDT switch, where ICs are embedded in the silicon cavity. The depth of the silicon cavity is 120μm. Thin film capacitors and spiral inductors integrated on the silicon substrate are used for impedance matching or DC blocking. The measured insertion loss of the SPDT switch was 0.7 dB at 2.45 GHz and the LNA and PA shows more than 20 dB of gain respectively. The size of fabricated RF-FEM is only 2.5×4.1×0.2 mm3.
机译：在本文中，我们使用薄膜集成和嵌入式IC技术开发了最小的混合IC RF FEM（前端模块）。使用标准薄膜工艺在硅衬底上集成了各种无源装置，并且有源器件嵌入硅衬底的空腔中。有机层压工艺用于填充硅和嵌入式IC之间的间隙。使用UV激光器制造层叠有机的信号通过互联网。 RF FEM由三个有源IC，PA，LNA和SPDT开关组成，其中IC嵌入硅腔中。硅腔的深度为120μm。集成在硅衬底上的薄膜电容器和螺旋电感器用于阻抗匹配或直流阻挡。 SPDT开关的测量插入损耗在2.45GHz下为0.7dB，LNA和PA分别显示出大于20 dB的增益。制造的RF-FEM的尺寸仅为2.5×4.1×0.2 mm3。

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