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Pointer Based Routing Scheme for On-chip Learning in Neuromorphic Systems

机译：基于指针的神经形态系统芯片学习路由方案

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A look-up table (LUT)-based spike-routing approach is often used in inference-only neuromorphic systems due to its excellent reconfigurability. The challenge is to apply this approach also to on-chip learning that requires a search of a lengthy LUT for all relevant synapses to a firing neuron. To solve this issue, we propose a pointer-based routing scheme that remarkably accelerates spike-routing at the cost of an additional LUT (pointer LUT). Our theoretical estimations suggest that the proposed routing scheme at 1 GHz clock speed supports a spiking neural network of up to 107 synapses and more than 105 neurons firing at 50 Hz without spike traffic congestion. The scheme needs approximately 32 MB memory. To verify experimentally, the proposed routing scheme was implemented on a Xilinx Virtex 7 FPGA board deploying an array of leaky integrate-and-fire neurons.
机译：基于查找表（LUT）的尖峰路由方法因其出色的可重新配置性而常用于仅推理的神经形态系统。面临的挑战是将这种方法也应用于需要学习冗长的LUT才能找到与发射神经元相关的所有突触的片上学习。为了解决此问题，我们提出了一种基于指针的路由方案，该方案以额外的LUT（指针LUT）为代价显着加快了尖峰路由。我们的理论估计表明，在1 GHz时钟速度下提出的路由方案可支持高达10的尖峰神经网络。 7 突触和超过10 5 神经元以50 Hz的频率发射而没有峰值交通阻塞。该方案大约需要32 MB内存。为了进行实验验证，该提议的路由方案是在Xilinx Virtex 7 FPGA板上实现的，该板上部署了一系列泄漏的集成即发神经元。

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