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A Compact 275 GHz Harmonic VCO with -2.6 dBm Output Power in a 130 nm SiGe Process

机译:在130 nm SiGe工艺中具有-2.6 dBm输出功率的紧凑型275 GHz谐波VCO

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This paper presents a new method for harmonic VCO design. A capacitive degeneration is employed to shape the output conductance (Gout) of the cross coupled structure to increase the possible oscillation frequency in addition to output power. An inductive feedback is utilized to provide large voltage swing at the input of the transistors to boost harmonic generation. Finally, the passive components at the collector improves the delivery of generated harmonic current to the load in addition to setting the oscillation frequency. Using this method, a 275 GHz harmonic VCO is designed and implemented in a 130 nm SiGe process. The measurement results show -2.6 dBm peak output power, 1.1% dc-to-RF efficiency, 3.3 % tuning range (270.3 GHz to 279.3 GHz). The chip area excluding the pads is 0.022 mm2 which results in 25 mW/mm2 power per area and 50 %/mm2 efficiency per area which is highest among reported SiGe/CMOS oscillators working above 0.75 fmax.
机译:本文提出了一种新的谐波VCO设计方法。电容性退化用于对交叉耦合结构的输出电导(Gout)进行整形,以增加输出功率之外的可能的振荡频率。利用感应反馈在晶体管的输入端提供较大的电压摆幅,以增强谐波的产生。最后,除设置振荡频率外,集电极上的无源组件还改善了生成的谐波电流向负载的传递。使用这种方法,可以在130 nm SiGe工艺中设计并实现275 GHz谐波VCO。测量结果显示,峰值输出功率为-2.6 dBm,DC-RF效率为1.1%,调谐范围为3.3%(270.3 GHz至279.3 GHz)。除焊盘外的芯片面积为0.022毫米 2 导致25 mW / mm 2 单位面积功率和50%/ mm 2 在0.75 f以上工作的报道的SiGe / CMOS振荡器中,单位面积的效率最高 max

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