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HiBRIC-MEM, a memory controller for PowerPC based systems

机译：Hibric-MEM，基于PowerPC系统的存储器控制器

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This paper describes the architecture and development of an innovative memory controller for the PowerPC family. HiBRIC-MEM (High Bandwidth Resource Interface Controller) provides control for up to two PowerPC processors. A look-ahead mechanism, called stream cache, is used to reduce the effective memory latency and a 12-bit error correction code is available for optimal system security. Initial silicon was produced in a 0.7 /spl mu/m, three metal layer Motorola technology and has a die size of 12.1/spl times/12.1 mm/sup 2/. HiBRIC-MEM is used, for example, in a commercially available parallel computer.

机译：本文介绍了PowerPC系列创新内存控制器的架构和开发。 Hibric-MEM（高带宽资源接口控制器）为最多两台PowerPC处理器提供控制。前瞻性机制，称为流缓存，用于降低有效的内存延迟，12位纠错码可用于最佳系统安全性。初始硅以0.7 / SPL MU / M，三个金属层摩托罗拉技术生产，并且具有12.1 / SPL时/ 12.1mm / sup 2 /的模具尺寸。 Hibric-MEM例如在市售的并行计算机中使用。

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《EUROMICRO Conference》|1997年||共5页
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Porrmann M.; Landmann J.; Institute of Electric and Electronic Engineer;
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中图分类自动化技术、计算机技术;
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HiBRIC-MEM, a memory controller for PowerPC based systems

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