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Design of 622 Mb/s 16-channel CMOS optical trnasceiver array

机译:622 MB / S 16通道CMOS光学TRNASCEIVER阵列的设计

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We describe design of 622 Mb/s -channel CMOS optical transceiver array using the 0.35 μm CMOS technology. The transceiver array consists of Laser Diode (LD) driver and limiting amplifier with trans-impedance amplifier. CMOS LD driver offers the capability of independent dc and modulation current adjustments. The dc circuit used to pre-bias LD is adjustable for the dc current at a range of 0~30 mA. Because each amplifier block is dc-coupled, there are several sources of non-linearity in the amplifier chains. These problems deteriorate the magnitude and timing performance. In order to solve these problems, we employ a compensate circuit which consist of positive and negative peak detectors and decision comparator. This scheme forces the data to be sliced in the middle eliminating timing errors. With this design technique, we have succeeded in developing a CMOS optical transceiver array with a high performance.
机译:我们使用0.35μmCMOS技术描述了622 MB / s -Channel CMOS光收发器阵列的设计。收发器阵列由激光二极管(LD)驱动器和利用跨阻抗放大器的限制放大器组成。 CMOS LD驱动器提供独立直流和调制电流调整的能力。用于预偏置LD的DC电路可调节为0〜30 mA的DC电流。因为每个放大器块是直流耦合的,所以放大器链中存在几个非线性源。这些问题劣化了幅度和定时性能。为了解决这些问题,我们采用补偿电路,该电路由正峰值检测器和决定比较器组成。该方案迫使数据在中间切片消除定时错误。通过这种设计技术,我们成功地开发了具有高性能的CMOS光收发器阵列。

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