In this paper, we present a digital technique to generate Pulse Width Modulation (PWM) signal using counters, comparators, and latching circuits implemented by Verilog HDL program based on FPGA. The proposed technique can simultaneously generate variable and multiple PWM outputs with parallel processing. Setting each reference-input signal can independently and easily vary the pulse width of each generated signal. The FPGA-based implementation can minimize the size of hardware. The communication can be easily done via a personnel computer. Application example in the design of the proposed technique as the parallel processing is also included.
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