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A High-performance Fourth-order Sigma-delta Micro-machined Accelerometer

机译:高性能四阶Sigma-delta微机械加速度计

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This paper reports on a system level design and analysis of a single-loop fourth-order sigma-delta (ΣΔ) accelerometer. Compared with a second-order single-loop ΣΔ modulator (ΣΔM) formed by the sensing element here the sensing element is cascaded with two extra electronic integrators to form the fourth ΣΔM, which has the advantages of better signal to quantization noise ratio (SQNR). System level simulation results indicate that the SQNR is 96.86 dB, and the effective number of bits (ENOB) is 15.8 bits when the over sampling ratio (OSR) is 128. Stability of the system is analyzed by root locus method based on the linear model established in this work, and the minimum gain of the quantizer K_(q min) is about 0.375.
机译:本文报告了单回路四阶sigma-delta(ΣΔ)加速度计的系统级设计和分析。与感应元件形成的二阶单环ΣΔ调制器(ΣΔM)相比,感应元件与两个额外的电子积分器级联形成第四个ΣΔM,其优点是具有更好的信噪比(SQNR) 。系统级仿真结果表明,当过采样率(OSR)为128时,SQNR为96.86 dB,有效位数(ENOB)为15.8位。基于线性模型,通过根轨迹法分析了系统的稳定性。建立在这项工作中,量化器的最小增益K_(q min)约为0.375。

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