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首页> 外文会议>Microelectronics Technology and Devices-SBMicro 2008 >Towards 21 Efficiency Silicon Solar Cells with Rear Passivation in Non-Ultra Clean Facilities: the Development of a Simplified Fabrication Process Achieving 670mV/ 660mV Open-Circuit Voltages using FZ and Cz Silicon Wafers
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Towards 21 Efficiency Silicon Solar Cells with Rear Passivation in Non-Ultra Clean Facilities: the Development of a Simplified Fabrication Process Achieving 670mV/ 660mV Open-Circuit Voltages using FZ and Cz Silicon Wafers

机译：在非超净设备中采用具有后钝化技术的效率达到21％的硅太阳能电池：采用FZ和Cz硅晶片的可简化制造工艺的开发，可实现670mV / 660mV的开路电压

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摘要

The development of a simple fabrication process of silicon solar cells n~+p with rear passivation is presented. Each optimized step was monitored by the photoconductive decay technique. The starting materials presented thickness about 300μm and low resistivity: FZ (0.5Ω.cm), Cz - type 1 (2.5Ω.cm) and Cz - type 2 (3.3Ω.cm). The Gaussian profile emitters were optimized with sheet resistance between 55Ω/sq and 100Ω/sq. After alneal, the maximum effective lifetimes measured at the excess carrier concentration corresponding to 1 Sun operation point at open-circuit condition were approximately 0.09ms, 0.25ms and 0.35ms for FZ, Cz-type 1 and Cz-type 2, accordingly. Excellent implied open-circuit voltages of 670.8mV, 652.5mV and 662.6mV, respectively could be associated to these measured lifetimes, representing solar cell efficiencies up to 20% if a low cost anti-reflection coating system random pyramids and SiO_2 layer is considered, even if a typical industrial wafer (Cz silicon with low resistivity) is used.
机译：提出了具有后钝化的硅太阳能电池n〜+ p的简单制造工艺的发展。每个优化步骤均通过光电导衰减技术进行监控。起始材料的厚度约为300μm，电阻率低：FZ（0.5Ω.cm），Cz-1型（2.5Ω.cm）和Cz-2型（3.3Ω.cm）。高斯轮廓发射器的薄层电阻在55Ω/ sq和100Ω/ sq之间进行了优化。铝制后，在FZ，Cz 1型和Cz 2型下，在开路条件下对应于1个Sun工作点的过量载流子浓度下测得的最大有效寿命分别约为0.09ms，0.25ms和0.35ms。这些测得的寿命可能分别具有670.8mV，652.5mV和662.6mV的出色的隐含开路电压，如果考虑使用低成本的减反射涂层系统随机金字塔和SiO_2层，则太阳能电池的效率可高达20％，即使使用典型的工业晶圆（具有低电阻率的Cz硅）。

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  • 来源
  • 会议地点 Gramado(BR);Gramado(BR);Gramado(BR);Gramado(BR);Gramado(BR);Gramado(BR)
  • 作者

    N. Stem; M. Cid; C. A. S. Ramos;

  • 作者单位

    Laboratorio de Microeletronica - Departamento de Engenharia de Sistemas Eletronicos, Escola Politecnica da Universidade de Sao Paulo, Zip Code 05508-970, Brazil;

    Laboratorio de Microeletronica - Departamento de Engenharia de Sistemas Eletronicos, Escola Politecnica da Universidade de Sao Paulo, Zip Code 05508-970, Brazil;

    Laboratorio de Microeletronica - Departamento de Engenharia de Sistemas Eletronicos, Escola Politecnica da Universidade de Sao Paulo, Zip Code 05508-970, Brazil;

  • 会议组织
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 微电子学、集成电路（IC）;
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