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首页> 外文会议>Microelectronics Technology and Devices-SBMicro 2008 >HIGH-k GATE-DIELECTRICS BASED ON TITANIUM- ALUMINUM FOR SUB-32 nm CMOS TECHNOLOGY
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HIGH-k GATE-DIELECTRICS BASED ON TITANIUM- ALUMINUM FOR SUB-32 nm CMOS TECHNOLOGY

机译：SUB-32 nm CMOS技术的基于钛铝的高k栅极电介质

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摘要

High k insulators for the next generation (sub-32 nm CMOS (complementary metal-oxide-semiconductor) technology), such as titanium-aluminum oxynitride (Ti_wAl_xO_yN_z) and titanium-aluminum oxide (Ti_wAl_xO_y), have been obtained by Ti/Al e-beam evaporation, with additional electron cyclotron resonance (ECR) plasma oxynitridation and oxidation on Si substrates, respectively. The physical thickness values between 5.7 nm and 6.3 nm were determined by ellipsometry. These films have been used as gate insulators in MOS capacitors, which were fabricated with Al electrodes and final sintering time at 450℃ for 10 min in forming gas. These capacitors were used to obtain capacitance-voltage (C-V) measurements. A relative dielectric constant of 3.9 was adopted to extract the Equivalent Oxide Thickness of films from C-V curves under strong accumulation condition, resulting in values between 1.9 and 1.7 nm, and the effective charge densities of about 10~(11) cm~(-2). These results indicate that the obtained Ti_wAl_xO_yN_z and Ti_wAl_xO_y films are suitable gate insulators for the next generation (MOS) devices.
机译：Ti / Al e已经获得了用于下一代（低于32 nm CMOS（互补金属氧化物半导体）技术）的高k绝缘体，例如氧氮化钛铝（Ti_wAl_xO_yN_z）和钛铝氧化物（Ti_wAl_xO_y）。 -束蒸发，分别在硅衬底上进行附加的电子回旋共振（ECR）等离子体氧氮化和氧化。通过椭圆偏振法测定在5.7nm和6.3nm之间的物理厚度值。这些薄膜已被用作MOS电容器中的栅绝缘体，该电容器是用Al电极制造的，最终形成时间为450℃，烧结时间为10分钟。这些电容器用于获得电容电压（C-V）测量。在强累积条件下，采用相对介电常数3.9从CV曲线中提取薄膜的等效氧化物厚度，其值在1.9至1.7 nm之间，有效电荷密度约为10〜（11）cm〜（-2） ）。这些结果表明，所获得的Ti_wAl_xO_yN_z和Ti_wAl_xO_y膜是下一代（MOS）器件的合适栅极绝缘体。

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  • 会议地点 Gramado(BR);Gramado(BR);Gramado(BR);Gramado(BR);Gramado(BR);Gramado(BR)
  • 作者

    J. Miyoshi; R. Wada; A.D. de Barros; A.A.G. Von Zuben; F.A. Cavarsan; I. Doi; J.A. Diniz;

  • 作者单位

    School of Electrical and Computer Engineering, State University of Campinas P. Box 6101, 13083-970 Campinas-SP, Brazil Center for Semiconductor Components, State University of Campinas P. Box 6061, 13083-870 Campinas-SP, Brazil;

    School of Electrical and Computer Engineering, State University of Campinas P. Box 6101, 13083-970 Campinas-SP, Brazil Center for Semiconductor Components, State University of Campinas P. Box 6061, 13083-870 Campinas-SP, Brazil;

    School of Electrical and Computer Engineering, State University of Campinas P. Box 6101, 13083-970 Campinas-SP, Brazil Center for Semiconductor Components, State University of Campinas P. Box 6061, 13083-870 Campinas-SP, Brazil;

    Gleb Wataghin Institute of Physics, State University of Campinas P.Box 6061,13083-870 Campinas-SP,Brazil;

    School of E;

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  • 正文语种 eng
  • 中图分类 微电子学、集成电路（IC）;
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