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Characterization of Power-Aware Reconfiguration in FPGA-Based Networking Hardware

机译：基于FPGA的网络硬件中的功耗感知重新配置的特性

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Dynamic reconfiguration of FPGA in the networking hardware device is a feature which can be exploited in numerous networking applications. By reconfiguration we can change either the functionality, performance or even energy consumption of an area on the FPGA. This property can be exploited in a number of ways, in different application areas. However, the question of performance and power consumption trade-off in these situations is still an open issue. In this paper we address this issue by investigating different use cases and introducing a general approach of algorithmic optimization of power consumption based on dynamic reconfiguration. Our findings are supported by extensive SystemC/TLM hardware level simulations.

机译：在联网硬件设备中对FPGA进行动态重新配置是一项可以在众多联网应用中利用的功能。通过重新配置，我们可以更改FPGA上某个区域的功能，性能甚至能耗。可以在不同的应用领域中以多种方式利用此属性。但是，在这些情况下性能和功耗之间的权衡问题仍然是一个未解决的问题。在本文中，我们通过研究不同的用例并介绍一种基于动态重新配置的功耗优化算法的一般方法来解决此问题。我们的发现得到大量SystemC / TLM硬件级别仿真的支持。

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来源
《Networking 2011 workshops》|2011年|p.281-290|共10页
会议地点 Valencia(ES);Valencia(ES);Valencia(ES);Valencia(ES);Valencia(ES);Valencia(ES);Valencia(ES);Valencia(ES);Valencia(ES)
作者
Sandor Plosz; Istvan Moldovan; Laszlo Kantor; Tuan Anh Trinh;
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作者单位

Dept. of Telecommunications and Media Informatics Budapest University of Technology and Economics;

Dept. of Telecommunications and Media Informatics Budapest University of Technology and Economics;

Aitia International, Budapest, Hungary Budapest University of Technology and Economics;

Dept. of Telecommunications and Media Informatics Budapest University of Technology and Economics;

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会议组织
原文格式 PDF
正文语种 eng
中图分类计算机网络;
关键词
networking; hardware; reconfiguration; power optimization; FPGA;

机译：联网;硬件;重新配置；功率优化；现场可编程门阵列;

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机译：具有模块化错误恢复的基于FPGA的TMR系统的重配置控制网络
3. The role of the asymptotic dynamics in the design of FPGA-based hardware implementations of gIF-type neural networks. [J] . Rostro Gonzalez H, Cessac B, Girau B, Journal of physiology, Paris. . 2011,第1a3期

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4. Characterization of Power-Aware Reconfiguration in FPGA-Based Networking Hardware [C] . Sandor Plosz, Istvan Moldovan, Laszlo Kantor, Workshop on network coding applications and protocols . 2011

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5. Development of an FPGA-based hardware evaluation system for use with GA-designed artificial neural networks. [D] . Earl, Dennis Duncan. 2004

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7. Characterization of Power-Aware Reconfiguration in FPGA-Based Networking Hardware [O] . Plósz, Sándor, Moldován, István, Kántor, László, 2011

机译：基于FPGA的网络硬件中的功耗感知重新配置的特性

Characterization of Power-Aware Reconfiguration in FPGA-Based Networking Hardware

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