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首页> 外文会议>Proceedings of the 4th annual SIGCSE/SIGCUE ITiCSE conference on Innovation and technology in computer science education >Teaching computer architecture with a new superscalar processor emulator
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Teaching computer architecture with a new superscalar processor emulator

机译：使用新的超标量处理器仿真器教授计算机体系结构

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Current computers use several techniques to improve performance such as cache memories, pipeline and multiple instruction issue per cycle. Using a real computer to teach these concepts is actually impractical, because these computers are designed to be programmed in high-level languages.In order to solve this problem, we have implemented a superscalar processor emulator, where most of the processor and cache parameters can be defined by the student. Its objective is to create a set of laboratory works allowing the student to observe how the different components of the computer evolve while executing an assembler program. It allows detection of the different kinds of cache misses and hazards as well as their impact on performance. Then, the student can apply some software techniques to reduce cache misses and to avoid hazards.
机译：当前的计算机使用多种技术来提高性能，例如高速缓存，流水线和每个周期的多指令发布。使用一台真正的计算机来教授这些概念实际上是不切实际的，因为这些计算机被设计为使用高级语言进行编程。为了解决此问题，我们实现了一个超标量处理器仿真器，其中大多数处理器和缓存参数都可以由学生定义。它的目的是创建一组实验室作品，使学生能够在执行汇编程序时观察计算机的不同组件如何演变。它允许检测不同类型的缓存未命中和危害以及它们对性能的影响。然后，学生可以应用一些软件技术来减少缓存丢失并避免危险。

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