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A CASE STUDY IN PREDICTIVE THREE-DIMENSIONAL TOPOGRAPHY SIMULATION BASED ON A LEVEL-SET ALGORITHM

机译:基于水平集算法的三维三维地形图模拟案例研究

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摘要

The aim of this work is to study the etching of trenches in silicon and the generation of voids during the filling of genuinely three-dimensional trench structures with silicon dioxide or nitride. The trenches studied are part of the manufacturing process of power MOSFETs, where void-less filling must be achieved. Another area of applications is capacitance extraction in interconnect structures, where the deliberate inclusion of voids serves the purpose of reducing overall capacitance. Furthermore, these simulations make it possible to analyze the variations on the feature scale depending on the position of the single trench on the wafer and in the reactor.
机译:这项工作的目的是研究在用二氧化硅或氮化物填充真正三维沟​​槽结构的过程中硅中沟槽的蚀刻以及空隙的产生。研究的沟槽是功率MOSFET制造工艺的一部分,在该工艺中必须实现无空隙填充。应用的另一个领域是互连结构中的电容提取,其中故意包含空隙的作用是降低整体电容。此外,这些模拟使得可以根据晶片和反应器中单个沟槽的位置来分析特征尺度上的变化。

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