Architectural Principles for One-Chip Parallel Computer

机译：单芯片并行计算机的架构原理

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This paper starts from the programmer's view and states architectural principles for designing the one-chip many processor computer. John Backus's and Gary Sabot's old visions about how a parallel computer must be programmed are followed in the context of the current technologies. The proposed architectural principles are exemplified with the Connex chip, a 1024-cell SPMD engine able to provide 120 GOPS/Watt, 6 GOPS/mm2 and 60 GOPS/$.

机译：本文从程序员的角度出发，阐述了设计单芯片多处理器计算机的体系结构原理。约翰·巴克斯（John Backus）和加里·萨伯特（Gary Sabot）关于必须如何编程并行计算机的旧观念是在当前技术的背景下遵循的。提议的架构原理以Connex芯片为例，该芯片是1024单元SPMD引擎，能够提供120 GOPS / Watt，6 GOPS / mm2和60 GOPS / $。

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来源
《Recent advances in information science》|2012年|143-148|共6页
会议地点 Paris(FR)
作者
MIHAELA MALIXA; GHEORGHE M. STEFAN;
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作者单位

Saint Anselm College Department of Computer Science 100 Saint Anselm Dr., Manchester New Hampshire, USA;

Politehnica University of Bucharest Faculty of Electronics 1-3 Maniu Bd. Bucharest ROMANIA;

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会议组织
原文格式 PDF
正文语种 eng
中图分类
关键词
Parallel computation; computer architecture; parallel programming; functional programming; many-cell computer;

机译：并行计算计算机架构;并行编程功能编程；多单元计算机;

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Architectural Principles for One-Chip Parallel Computer

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