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An AMBA AHB-based reconfigurable SoC architecture using multiplicity of dedicated flyby DMA blocks

机译:基于AMBA,基于AHB的可重配置SoC架构,使用了多个专用的飞越DMA模块

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We propose a system-on-chip (SoC) architecture for reconfigurable applications based on the AMBA high-speed bus (AHB). The architecture features multiple low-area flyby DMA blocks for transferring configuration data. Furthermore, the architecture eliminates the use of energy-consuming instructions used in comparable commercial reconfigurable SoCs. The flyby DMA blocks achieve a reduction of up to 98% in the number of gates found in general-purpose DMA controllers. The DMA blocks also achieve the flyby throughput which halves the number of clock cycles used in conventional DMA for data transfer. We also demonstrate the presence of parallel processing which contributes to improved system performance of the proposed architecture over commercial comparatives.
机译:我们提出了一种基于AMBA高速总线(AHB)的可重配置应用程序的片上系统(SoC)架构。该架构具有多个低区域飞越DMA块,用于传输配置数据。此外,该架构消除了可比的商业可重配置SoC中使用的能耗指令的使用。飞越DMA模块可将通用DMA控制器中的门数量减少多达98%。 DMA模块还实现了飞越吞吐量,将传统DMA中用于数据传输的时钟周期数减少了一半。我们还演示了并行处理的存在,与商业比较相比,并行处理有助于改善所提出体系结构的系统性能。

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