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首页> 外文会议>Symposium on Flat-Panel Displays and Sensors-Principles, Materials and Processes held April 4-9, 1999, San Francisco, California, U.S.A. >Stress and dopant activation in solid phase crystalized Si films
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Stress and dopant activation in solid phase crystalized Si films

机译：固相结晶硅膜中的应力和掺杂物活化

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摘要

Defect creation mechanisms during solid phse crystallization (SPC) of Si thin films were investigated with PECVD amorphous precursor samples produced with various deposition temperatures and thicknesses. These precursor films were implanted with dopant and then crystallized to obtain both SPC and dopant activation. The doping efficiendcy was found to decrease with the tensile stress level as mesured by Raman shift. The stress shows a decrease as the precursor deposition temperature and thickness are lowered. Furthermore, a lower level of stress is induced by rapid thermal annealing when the annelaing temperature is high enough to soften the glass substrate on which the films were deposited. We show that by controol of stress during the SPC step, intragrain defect density can be lowered and electronic quanity of the resulting polycrystalline Si films can be improved. Based on these observations, we propose the following tentative model to explain the defect creation: during SPC, tensile sress evolutioon if considered to result from the volumetric contraction of Si film when it transforms from the amorphous to crystalline phase. This contraction is retarded by the substrate, which imposes a tensile stress on the film. A high level of stress leads to formation of structural defects inside the grains of the resulting polycrystalline material. These defects trap carriers or complex with the dopant reducing doping efficiency.
机译：用具有不同沉积温度和厚度的PECVD非晶前体样品研究了Si薄膜固相结晶（SPC）期间的缺陷产生机理。这些前体膜注入有掺杂剂，然后结晶以获得SPC和掺杂剂激活。发现通过拉曼位移测量，掺杂效率随着拉伸应力水平而降低。应力随着前驱物沉积温度和厚度的降低而降低。此外，当退火温度足够高以软化其上沉积膜的玻璃基板时，通过快速热退火引起较低水平的应力。我们表明，通过在SPC步骤中控制应力，可以降低晶粒内缺陷密度，并可以改善所得多晶硅膜的电子质量。基于这些观察结果，我们提出以下暂定模型来解释缺陷的产生：在SPC期间，如果认为是由于Si膜从非晶相转变为结晶相时的体积收缩而导致拉伸应力变化。该收缩被基材延迟，这在膜上施加了张应力。高水平的应力导致在所得多晶材料的晶粒内部形成结构缺陷。这些缺陷会俘获载流子或与掺杂物形成复合物，从而降低掺杂效率。

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