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A highly efficient UHF RFID frontend approach

机译:高效的UHF RFID前端方法

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摘要

The passive radio frequency identification (RFID) presents a key technology for unattended wireless networks. To achieve a higher reading range and to improve the operational reliability of passive RFID tags, the design of integrated circuits with an ultra low power consumption and novel concepts for high-efficiency energy harvesting are required. This paper presents a highly efficient analog frontend for passive UHF RFID transponders. This frontend includes a multistage Schottky rectifier, a backscatter modulator, an ASK demodulator, a current reference source, and power limiting circuits. These building blocks are implemented in a 0.14 µm CMOS technology. The measured overall RF-to-DC conversion efficiency of the analog frontend for a DC output power of 10 µW (1V and 10 µA) is about 20%. The DC power consumption of the analog building blocks is about 1 µW for a supply voltage of 1V.
机译:无源射频识别(RFID)是无人值守无线网络的一项关键技术。为了实现更高的读取范围并提高无源RFID标签的操作可靠性,需要设计具有超低功耗的集成电路以及用于高效能量收集的新颖概念。本文提出了一种用于无源UHF RFID应答器的高效模拟前端。该前端包括一个多级肖特基整流器,一个反向散射调制器,一个ASK解调器,一个电流基准源和功率限制电路。这些构建模块以0.14 µm CMOS技术实现。对于10 µW(1V和10 µA)的DC输出功率,模拟前端测得的总体RF-DC转换效率约为20%。对于1V的电源电压,模拟构建块的DC功耗约为1 µW。

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