首页> 外文学位 >Leveraging the Advantages of Large-Area Electronics and CMOS ICs in Hybrid Systems and Circuits.
【24h】

Leveraging the Advantages of Large-Area Electronics and CMOS ICs in Hybrid Systems and Circuits.

机译:利用混合系统和电路中大面积电子和CMOS IC的优势。

获取原文
获取原文并翻译 | 示例

摘要

Through five decades of Moore's-law scaling, Integrated Circuits (ICs) have resulted in high- value functions, integrated with tremendous variety and capacity. Though excelling at computation, ICs have their drawbacks in interfacing with the physical world due to their form factor and limited ability to implement transducers (sensors, actuators, energy harvesters, etc.). On the other hand, by enabling diverse, flexible and large-scale transducers, Large-area Electronics (LAE) raises the potential for electronic systems to interact much more extensively with the physical world than is possible today. This can substantially expand the scope of applications, both in number and in value. But first, translation into applications requires a set of subsystem functions (instrumentation, computation, power management, communication, etc.). Though computational devices such as thin-film transistors can also be built in LAE, their low electrical performance tends to exclude them from realizing certain functions, such as computation and instrumentation. Thus it is necessary to combine LAE with high-performance, high-efficiency technologies, such as crystalline silicon CMOS ICs, within hybrid systems to leverage the advantages of both technologies. Such hybrid systems require: 1) rethinking each subsystem's architecture from the start by considering how the functions should be allocated and how the technologies should be interfaced, on both a functional and physical level; and 2) developing new circuit topologies and algorithms for the whole hybrid architectures.;In this thesis, we explore hybrid power management, wireless communication, sensing and instrumentation subsystems designed by employing new system architectures, circuit topologies, and specific algorithms. The top-down evaluation of design alternatives within the hybrid design space and pursuit of template architectures exposes circuit functions and device optimizations traditionally overlooked by bottom up approaches alone.
机译:经过数十年的摩尔定律缩放,集成电路(IC)产生了高价值的功能,并具有巨大的多样性和容量。尽管在计算方面表现出色,但由于其外形尺寸和实现换能器(传感器,致动器,能量收集器等)的能力有限,IC在与物理世界接口方面存在缺点。另一方面,通过启用多样化,灵活且大规模的换能器,大面积电子(LAE)增强了电子系统与物理世界进行更广泛交互的潜力,远超当今。这可以在数量和价值上大大扩展应用范围。但是首先,转换为应用程序需要一组子系统功能(仪器,计算,电源管理,通信等)。尽管还可以在LAE中构建诸如薄膜晶体管之类的计算设备,但是它们的低电性能往往使它们无法实现某些功能,例如计算和仪器仪表。因此,有必要在混合系统中将LAE与高性能,高效率技术(例如晶体硅CMOS IC)相结合,以利用两种技术的优势。这样的混合系统需要:1)从一开始就在功能和物理级别上考虑应如何分配功能以及如何接口技术来重新考虑每个子系统的体系结构; 2)为整个混合架构开发新的电路拓扑和算法。本文探讨了采用新的系统架构,电路拓扑和特定算法设计的混合电源管理,无线通信,传感和仪表子系统。在混合设计空间内对设计方案的自上而下的评估以及对模板体系结构的追求暴露了传统上仅由自下而上的方法所忽略的电路功能和设备优化。

著录项

  • 作者

    Huang, Liechao.;

  • 作者单位

    Princeton University.;

  • 授予单位 Princeton University.;
  • 学科 Electrical engineering.;Materials science.;Computer engineering.
  • 学位 Ph.D.
  • 年度 2016
  • 页码 179 p.
  • 总页数 179
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号