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Rapid and efficient multi objective design space exploration methods in high level synthesis of computation intensive applications.

机译：快速高效的多目标设计空间探索方法，可用于计算密集型应用程序的高级综合。

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摘要

Design Space Exploration (DSE) is an indispensable segment of the High Level Synthesis (HLS) design process. Moreover, the enormous increase in complexity of the recent Very Large Scale Integration (VLSI) circuits has only been possible due to use of advanced DSE techniques during HLS process. This dissertation presents four automated optimization algorithms and methodologies that are capable to handle various multi-objective problems during design space exploration and high level synthesis of computation intensive applications. Algorithmic solutions to four different branches of DSE problems have been proposed in this dissertation viz. a) Solution to power-performance-area/cost trade-off of Digital Signal Processing (DSP) kernels using priority factor process which also includes deriving analytical mathematical model for modern performance parametric frameworks b) Solution to area-performance-power tradeoff/ power-performance-area tradeoff of DSP kernels using hybridization of fuzzy algorithm and vector design space technique with Self-Correction Scheme c) Solution to dual parametric optimization using efficient multi structure genetic algorithm for integrated scheduling and allocation and d) Solution to control step bound static power optimization using power gradient methodology for integrated scheduling and allocation. Some techniques proposed are equipped with pipelined execution time parameter (based on need), in addition to hardware area, power and cost depending on the user's objective for exploration of a final solution in a short time. In addition to architecture exploration capability, rapid automated circuit generation of DSP kernels is also possible in a short time for verification and synthesis in Field Programmable Gate Array (FPGA) platforms. The proposed exploration approaches are applied to custom data intensive applications (application specific processors/custom processors) or standalone Application Specific Integrated Circuits (ASIC's). Results of the experiments for proposed approaches on all the standard DSP benchmarks have indicated improvements either in terms of exploration runtime, quality of final solution, reduced execution time, power and area or a multiple combination of all factors when compared to recent approaches.
机译：设计空间探索（DSE）是高级综合（HLS）设计过程中必不可少的部分。而且，仅由于在HLS处理过程中使用了先进的DSE技术，才可能使最近的超大规模集成电路（VLSI）的复杂性大大增加。本文提出了四种自动优化算法和方法，能够在设计空间探索和计算密集型应用程序的高级综合过程中处理各种多目标问题。本文提出了DSE问题四个不同分支的算法解决方案。 a）使用优先级因子过程解决数字信号处理（DSP）内核的功率-性能/成本折衷方案，其中还包括推导现代性能参数框架的分析数学模型b）面积-性能-功率折衷/功耗的解决方案模糊算法和向量设计空间技术与自校正方案的混合，在DSP内核的性能区域之间进行权衡c）使用高效的多结构遗传算法进行集成调度和分配的双参数优化解决方案，以及d）控制步进约束静态的解决方案使用功率梯度方法进行功率优化，以实现集成调度和分配。所提出的一些技术还配备了流水线执行时间参数（根据需要），此外还具有硬件面积，功耗和成本，这取决于用户在短时间内探索最终解决方案的目标。除了架构探索能力之外，还可以在短时间内快速自动生成DSP内核的电路，以在现场可编程门阵列（FPGA）平台中进行验证和综合。所提出的探索方法适用于定制数据密集型应用程序（专用处理器/定制处理器）或独立的专用集成电路（ASIC）。与最新方法相比，在所有标准DSP基准上针对所建议方法的实验结果表明，在探索运行时间，最终解决方案的质量，减少的执行时间，功耗和面积或所有因素的多重组合方面都有改进。

著录项

  • 作者

    Sengupta, Anirban.;

  • 作者单位

    Ryerson University (Canada).;

  • 授予单位 Ryerson University (Canada).;
  • 学科 Engineering Electronics and Electrical.;Engineering General.;Engineering Computer.
  • 学位 Ph.D.
  • 年度 2013
  • 页码 145 p.
  • 总页数 145
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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