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Evolutionary and Disruptive Approaches for Designing Next-Generation Ultra Energy-Efficient Electronics.

机译:设计下一代超节能电子产品的进化和突破性方法。

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摘要

With growing concerns over the energy crisis, the semiconductor industry is motivated to reduce its energy consumption by deploying emerging nanotechnologies. This research contributes to such attempts by (1) introducing novel methods to evaluate energy consumption of nanoscale circuits and systems, (2) improving the energy efficiency of micro-architectures by employing innovative circuit design methods and (3) investigating the implications of employing Nano-Electro-Mechanical Switches (NEMS) to reduce the power consumption of VLSI circuits.;In the first part of the dissertation, we propose an accurate method for full-chip estimation of energy consumption in VLSI circuits considering the impact of parameter fluctuations. Furthermore, a novel variation-tolerant wide fan-in dynamic OR gate (a key component used in memory designs) will be introduced, which enables circuit designers to simultaneously improve the energy-efficiency as well as reliability. I will also introduce a new source of threshold voltage variation, which results in higher energy consumption in nano-scaled designs. The new source of process variation is unique to high-k/metal gate transistors and is caused by the dependency of work function of metal grains on their orientations. The implications of this source of random variations on the energy consumption, reliability and performance of SRAM cells will be investigate.;In the second part of the dissertation, the implications of employing NEMS devices for improving the energy efficiency of circuits and systems will be discussed. NEMS transistors, while disruptive, are attractive devices because they offer unbeatable subthreshold characteristics (energy efficiency) compared to all other emerging solid-state transistors. In this dissertation, the implications of employing various NEMS devices on digital circuit design are explored. Particularly, a new class of NEMS devices called Laterally-Actuated Double-Gate NEMS transistor is introduced and analyzed. It is shown that such devices can be employed to implement highly energy-efficient and ultra compact XOR gates, which are the key building blocks for more complex computational units. The lateral NEMS device also creates new opportunities in Boolean logic minimization and seems promising for implementing high-performance arithmetic modules (such as Adders). A comprehensive scaling analysis of the NEMS devices is also conducted to identify the key challenges that must be overcome before such transistors can be incorporated in the mainstream IC technologies.
机译:随着人们对能源危机的担忧与日俱增,半导体行业被迫通过部署新兴的纳米技术来降低其能源消耗。这项研究通过以下方式为此类尝试做出了贡献:(1)介绍评估纳米级电路和系统能耗的新颖方法;(2)通过采用创新的电路设计方法提高微体系结构的能源效率;(3)研究采用纳米技术的含义-机电开关,以减少VLSI电路的功耗。在论文的第一部分,我们提出了一种精确的方法,该方法考虑了参数波动的影响,对VLSI电路的功耗进行全芯片估计。此外,将介绍一种新颖的,耐变化的宽扇入动态或门(存储器设计中使用的关键组件),这使电路设计人员能够同时提高能效和可靠性。我还将介绍一种阈值电压变化的新来源,这将导致纳米级设计中的能耗更高。新的工艺变化源是高k /金属栅晶体管所独有的,并且是由金属晶粒的功函数对其取向的依赖性所引起的。将研究这种随机变化源对SRAM单元的能耗,可靠性和性能的影响。在论文的第二部分中,将讨论采用NEMS器件来提高电路和系统的能量效率的含义。 。 NEMS晶体管虽然具有破坏性,但却是有吸引力的设备,因为与所有其他新兴的固态晶体管相比,它们具有无与伦比的亚阈值特性(能效)。本文探讨了采用各种NEMS器件对数字电路设计的意义。特别是,引入并分析了一种新型的NEMS器件,称为横向激活双栅极NEMS晶体管。结果表明,此类设备可用于实现高能效和超紧凑的XOR门,这是更复杂的计算单元的关键构建块。横向NEMS器件还为布尔逻辑最小化创造了新机会,并且对于实现高性能算术模块(如加法器)似乎很有希望。还对NEMS器件进行了全面的缩放分析,以确定在将此类晶体管纳入主流IC技术之前必须克服的关键挑战。

著录项

  • 作者

    Dadgour, Hamed F.;

  • 作者单位

    University of California, Santa Barbara.;

  • 授予单位 University of California, Santa Barbara.;
  • 学科 Engineering Computer.;Nanotechnology.;Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2010
  • 页码 269 p.
  • 总页数 269
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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