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Modeling and optimization techniques for efficient implementation of parallel embedded systems.

机译：有效实现并行嵌入式系统的建模和优化技术。

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摘要

Embedded systems are becoming more and more important. The products containing embedded systems span from day-to-day household and consumer products, such as digital TVs, mobile phones, and automobiles, to industrial devices and equipment, including, for example, robots, aviation equipment, and high end military and scientific devices such as aircraft. Previously, because embedded systems were highly limited in computational capability, memory size, and power consumption, much research was dedicated to making the best use of limited system resources. In these works, system performance issues, such as execution time, were traded off with system resources, and resources were carefully scheduled and utilized. With more available computational capability in embedded system devices, and more complicated requirements demanding more intensive computation, the most critical design concerns are changing in some important application domains. In such application areas, researchers are paying more and more attention to improving system execution time, which is also the core topic of our work. Execution time is especially critical to real time systems, in the sense that it is related not only to system performance, but also to system correctness and reliability.;Multi-core devices, which incorporate two or more processors on the same integrated circuits, are becoming increasingly relevant to the design and implementation of embedded systems. In multi-core platforms, carefully managing communication and synchronization among different cores is important to achieve efficient implementations. Two or more processing cores sharing the same system bus and memory bandwidth limit the achievable performance improvements. The ability of multi-core processors to increase application performance depends on the use of multiple concurrent tasks within applications. Therefore, if code is written in a form that facilitates decomposition into concurrent tasks, the multi-core technologies can be exploited more effectively. Dataflow-based languages are suitable for such decomposition into concurrent tasks, particularly in the broad domain of digital signal processing (DSP) applications.;Dataflow representations of DSP software have been explored actively since the 1980s. Such representations have proved to be useful in identifying bottlenecks in DSP algorithms, improving the efficiency of the computations, and designing appropriate hardware for implementing the algorithms.;Dataflow descriptions have been used in a wide range of DSP application areas, such as multimedia processing, and wireless communications. Among various forms of dataflow modeling, synchronous dataflow (SDF) is geared towards static scheduling of computational modules, which improves system performance and predictability. However, many DSP applications do not fully conform to the restrictions of SDF modeling. More general dataflow models, such as CAL, have been developed to describe dynamically-structured DSP applications. Such generalized models can express dynamically changing functionality, but lose the powerful static scheduling capabilities provided by SDF.;This thesis explores modeling and optimization techniques for efficient implementation of parallel embedded systems. We propose a dataflow based framework, which covers modeling, analysis and optimization and bridges between user-friendly design and efficient implementation. The framework is applied to two kinds of applications: control systems and video processing systems.;Model Predictive Control (MPC) has been used in a wide range of application areas including chemical engineering, food processing, automotive engineering, aerospace, and metallurgy. An important limitation on the application of MPC is the difficulty in completing the necessary computations within the sampling interval. Recent trends in computing hardware towards greatly increased parallelism offer a solution to this problem. Our work describes modeling and analysis tools to facilitate implementing MPC algorithms on parallel computers, thereby greatly reducing the time needed to complete the calculations. The use of these tools is illustrated by an application to the critical components of an important class of MPC problems, including the Newton-KKT algorithm, the active set method and linear system solvers.;This thesis also presents an in-depth case study of dataflow-based analysis and exploitation of parallelism in the design and implementation of an MPEG RVC (reconfigurable video coding) decoder. Because dataflow models are effective in exposing concurrency and other important forms of high level application structure, dataflow techniques are promising for implementing complex DSP applications on multi-core systems, and other kinds of parallel processing platforms. Targeting video processing systems, we use the CAL language as a concrete framework for representing and demonstrating dataflow design techniques. Furthermore, we also analyze our application of the DIF package (TDP), which helps to automatically process regions that are extracted from the original network, and exhibit properties similar to synchronous dataflow (SDF) models. Detection of SDF-like regions is an important step for applying static scheduling techniques within a dynamic dataflow framework. Furthermore, segmenting a system into SDF-like regions also allows us to explore cross-actor concurrency that results from dynamic dependencies among different regions. (Abstract shortened by UMI.)
机译：嵌入式系统变得越来越重要。包含嵌入式系统的产品涵盖了从日常家用和消费类产品（例如数字电视，移动电话和汽车）到工业设备和设备，包括例如机器人，航空设备以及高端军事和科学设备飞机等设备。以前，由于嵌入式系统在计算能力，内存大小和功耗方面受到极大限制，因此许多研究致力于最大限度地利用有限的系统资源。在这些工作中，将系统性能问题（例如执行时间）与系统资源进行了权衡，并对资源进行了仔细的调度和利用。嵌入式系统设备中具有更多可用的计算能力，并且更复杂的要求要求更密集的计算，因此在一些重要的应用领域中，最关键的设计问题正在发生变化。在这样的应用领域，研究人员越来越关注缩短系统执行时间，这也是我们工作的核心主题。执行时间对于实时系统尤其重要，因为执行时间不仅与系统性能有关，而且还与系统正确性和可靠性有关。多核设备在同一集成电路上集成了两个或多个处理器，与嵌入式系统的设计和实现越来越相关。在多核平台中，认真管理不同核之间的通信和同步对于实现有效的实现很重要。共享同一系统总线和内存带宽的两个或多个处理内核限制了可实现的性能改进。多核处理器提高应用程序性能的能力取决于在应用程序中使用多个并发任务。因此，如果以有助于分解为并发任务的形式编写代码，则可以更有效地利用多核技术。基于数据流的语言适合于分解为并发任务，尤其是在数字信号处理（DSP）应用的广泛领域中。自1980年代以来，一直积极探索DSP软件的数据流表示形式。事实证明，这种表示形式对于识别DSP算法中的瓶颈，提高计算效率以及设计适当的硬件以实现算法非常有用。数据流描述已广泛用于DSP应用领域，例如多媒体处理，和无线通信。在各种形式的数据流建模中，同步数据流（SDF）面向计算模块的静态调度，从而提高了系统性能和可预测性。但是，许多DSP应用程序并不完全符合SDF建模的限制。已经开发了更通用的数据流模型（例如CAL）来描述动态结构化的DSP应用程序。这样的通用模型可以表达动态变化的功能，但是却失去了SDF提供的强大的静态调度功能。本论文探讨了有效实现并行嵌入式系统的建模和优化技术。我们提出了一个基于数据流的框架，该框架涵盖了建模，分析和优化以及人性化设计和高效实现之间的桥梁。该框架适用于两种应用：控制系统和视频处理系统。模型预测控制（MPC）已在包括化学工程，食品加工，汽车工程，航空航天和冶金学等广泛的应用领域中使用。 MPC应用的一个重要限制是难以在采样间隔内完成必要的计算。计算硬件向并行性大大提高的最新趋势为这一问题提供了解决方案。我们的工作描述了建模和分析工具，以促进在并行计算机上实现MPC算法，从而大大减少了完成计算所需的时间。通过将这些工具应用于一类重要的MPC问题的关键组件，包括Newton-KK​​T算法，活动集方法和线性系统求解器，说明了这些工具的使用。在MPEG RVC（可重配置视频编码）解码器的设计和实现中，基于数据流的并行性分析和开发。由于数据流模型可以有效地公开并发和其他重要形式的高级应用程序结构，因此数据流技术有望在多核系统和其他种类的并行处理平台上实现复杂的DSP应用程序。针对视频处理系统，我们使用CAL语言作为表示和演示数据流设计技术的具体框架。此外，我们还分析了DIF软件包（TDP）的应用，该软件包有助于自动处理从原始网络提取的区域，并展现出与同步数据流（SDF）模型相似的属性。 SDF类区域的检测是在动态数据流框架内应用静态调度技术的重要步骤。此外，将系统划分为类似SDF的区域也使我们能够探索由于不同区域之间的动态依赖性而导致的跨参与者并发。 （摘要由UMI缩短。）

著录项

  • 作者

    Gu, Ruirui.;

  • 作者单位

    University of Maryland, College Park.;

  • 授予单位 University of Maryland, College Park.;
  • 学科 Engineering Computer.
  • 学位 Ph.D.
  • 年度 2010
  • 页码 179 p.
  • 总页数 179
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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