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Gate tunneling in MOSFETs and dynamic characteristics of MOS integrated circuits.

机译：MOSFET中的栅极隧穿和MOS集成电路的动态特性。

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摘要

Aggressive scaling of MOSFETs projects devices with oxide thicknesses as small as 6 A in the near-term. At these dimensions, electrons can easily tunnel through the gate oxide barrier. The impact of large tunneling currents on the properties of MOSFETs is not well known. Quantum tunneling through MOS barrier structures has been studied in isolation from a quantum physics perspective, but has not been integrated into a device context. Furthermore, the impact of large tunneling currents on the performance of CMOS logic circuits is also not well known. Classical MOSFET compact models do not incorporate gate tunneling currents. Attempts to include gate tunneling currents in compact models and circuit simulation resort to either macromodel wrappers around classical compact models, or inconsistent and unphysical techniques. In this thesis, the impact of gate tunneling currents on the operation of the MOSFET is studied in detail and a new model for the NMOSFET in strong inversion with gate tunneling current is derived. MOS devices with gate tunneling are simulated in MEDICI and a simple model for gate tunneling currents in a device context is proposed. The system of equations for the operation of a MOSFET is then revisited with the presence of gate tunneling current and an approximate strong inversion model is derived. Furthermore, the impact of tunneling on dynamic performance of CMOS circuits is assessed. A broad range of simulations are performed in HSPICE to isolate the impact gate tunneling will have on circuit operation. New models for power dissipation and dynamic noise margins are derived that account for the presence of gate tunneling currents and are shown to correlate well with simulation results.
机译：MOSFET的激进缩放比例在短期内投射出的氧化物厚度仅为6 A的器件。在这些尺寸下，电子可以很容易地穿过栅氧化层。大的隧穿电流对MOSFET的性能的影响尚不清楚。从量子物理学的角度出发，已经对通过MOS势垒结构的量子隧穿进行了单独研究，但尚未集成到器件环境中。此外，还不知道大的隧穿电流对CMOS逻辑电路的性能的影响。经典的MOSFET紧凑型模型不包含栅极隧穿电流。试图将栅极隧穿电流包括在紧凑模型和电路仿真中，要么采用围绕经典紧凑模型的宏模型封装，要么采用不一致和非物理的技术。本文详细研究了栅极隧穿电流对MOSFET工作的影响，并推导了NMOSFET在栅极隧穿电流强反作用下的新模型。在MEDICI中模拟了具有栅极隧道效应的MOS器件，并提出了一种在器件环境下用于栅极隧道效应电流的简单模型。然后，在存在栅极隧穿电流的情况下，重新讨论MOSFET工作方程组，并推导出一个近似的强反型模型。此外，评估了隧穿对CMOS电路动态性能的影响。在HSPICE中执行了广泛的仿真，以隔离栅极隧穿对电路操作的影响。推导了功耗和动态噪声容限的新模型，这些模型考虑了栅极隧穿电流的存在，并显示出与仿真结果的良好相关性。

著录项

  • 作者

    Jopling, Jason.;

  • 作者单位

    Duke University.;

  • 授予单位 Duke University.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2004
  • 页码 346 p.
  • 总页数 346
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;
  • 关键词

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