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Implementation, ajustement laser et modelisation des convertisseurs numerique a analogique R2R.

机译：R2R数模转换器的实现，激光调整和建模。

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摘要

Most electronic systems now rely on digital signal processing (DSP) of the information. Benefits like speed, error detection and correction, compact memories are key aspects which tend to reduce analog circuitry to a very limited set of functions. Typical examples of such functions are power management and data converter blocks, and this work concentrates on digital to analog conversion circuits.;Scaling down device sizes and power supply level has regularly enabled integration of more DSP power in smaller silicon areas. With these new technology constrains, designing a data converter that combines speed and precision becomes more challenging. However, meeting this challenge allows merging analog and digital blocks together into a single chip to create compact system-on-chip (SOC) devices.;This research explores DAC circuits for high performance conversion and focuses on the R2R architecture. This parallel architecture allows fast data conversion but its resolution is typically limited by the mismatch level found between its components. The goal of the present work is to optimize different aspects of R2R DACs : resolution, area, speed and modelization.;A first prototype circuit demonstrates how it is possible to enhance resolution of an R2R DAC fabricated in a standard technology using a recently developed laser diffusion technique. This technique, which allows creating electric links between diffusion regions, is used to correct mismatch errors in the R2R network of a 14 bit DAC. The converter's linearity, initially limited by mismatch level, is enhanced to reach 14 bit resolution. The circuit, fabricated in a standard CMOS process and laser trimmed, is the smallest parallel 14 bit DAC ever presented.;A second prototype circuit integrates a new switch sizing solution which allows reducing area, power consumption and settling time of R2R DACs. This circuit demonstrate that it is possible to reduce and equalize the size of R2R DAC switches using a new compensation technique. The presented switch sizing solution offers enhanced dynamic performance without any static performance loss.;To complete the R2R network analysis, a mathematical analysis of input and output impedances is presented allowing the introduction of new R2R DAC models. These models allow fast and accurate simulation of many R2R DACs aspects, and highlight some important circuit details to increase the accuracy of these converters.
机译：现在，大多数电子系统都依赖于信息的数字信号处理（DSP）。诸如速度，错误检测和纠正，紧凑型存储器之类的优势是关键方面，它们往往会将模拟电路缩减为功能非常有限的一组。此类功能的典型示例是电源管理和数据转换器模块，并且这项工作集中在数模转换电路上。缩小器件尺寸和电源电平，通常可以在较小的硅面积上集成更多的DSP电源。由于这些新技术的限制，设计一种兼具速度和精度的数据转换器变得更具挑战性。然而，迎接这一挑战允许将模拟和数字模块合并到一个芯片中，以创建紧凑的片上系统（SOC）器件。该研究探索了用于高性能转换的DAC电路，并着眼于R2R架构。这种并行体系结构可以实现快速的数据转换，但是其分辨率通常受其组件之间不匹配级别的限制。当前工作的目标是优化R2R DAC的不同方面：分辨率，面积，速度和建模。；第一个原型电路演示了如何使用最新开发的激光器来增强以标准技术制造的R2R DAC的分辨率。扩散技术。允许在扩散区域之间建立电连接的这项技术用于校正14位DAC的R2R网络中的失配误差。转换器的线性度最初受到失配水平的限制，现已增强到14位分辨率。该电路采用标准CMOS工艺制造并经过激光修整，是有史以来最小的并行14位DAC。第二个原型电路集成了新的开关尺寸解决方案，可减小R2R DAC的面积，功耗和建立时间。该电路证明，使用新的补偿技术可以减小和均衡R2R DAC开关的尺寸。提出的开关尺寸解决方案提供了增强的动态性能，而没有任何静态性能损失。为了完成R2R网络分析，对输入和输出阻抗进行了数学分析，从而允许引入新的R2R DAC模型。这些模型允许对R2R DAC的许多方面进行快速准确的仿真，并突出显示一些重要的电路细节，以提高这些转换器的精度。

著录项

  • 作者

    Marche, David.;

  • 作者单位

    Ecole Polytechnique, Montreal (Canada).;

  • 授予单位 Ecole Polytechnique, Montreal (Canada).;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2009
  • 页码 209 p.
  • 总页数 209
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 无线电电子学、电信技术;
  • 关键词

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