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A retargetable compiler and virtual machine based methodology for assessment of instruction set architectures.

机译：一种可重定向的编译器和基于虚拟机的方法，用于评估指令集体系结构。

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摘要

This research has produced a new methodology called ISAS (Instruction Set Architecture Assessment System) for performance assessment of proposed and existing instruction set architectures, independent of implementation and realization technologies. The methodology supports the configuration of one, two and three-address, scalar SISD (Single Instruction Single Data stream) architectures with a wide array of operation sets, operand access and addressing modes, register set architectures and subroutine linkage mechanisms. After menu-based selection of desired architectural elements from an ISA taxonomy, a compiler, an assembler and a virtual machine module, using a standard mnemonic set for the target architecture, are automatically configured. C benchmarks, representing the target environment, can subsequently be compiled, assembled and virtually executed to generate a variety of architectural performance measures, including bit budget, bit traffic and number of static/dynamic instructions. The methodology has been validated by comparing measured data from two existing architectures with data obtained by modeling these architectures directly in ISAS. A comprehensive series of architectural case studies modeled in ISAS additionally demonstrate the applicability and practicality of the methodology in performing efficient architectural assessments.
机译：这项研究产生了一种称为ISAS（指令集体系结构评估系统）的新方法，该方法可以独立于实现和实现技术对提议的和现有的指令集体系结构进行性能评估。该方法支持配置一个，两个和三个地址的标量SISD（单指令单数据流）体系结构，该体系结构具有多种操作集，操作数访问和寻址模式，寄存器集体系结构和子例程链接机制。在从ISA分类中基于菜单选择所需的体系结构元素之后，将自动配置编译器，汇编器和虚拟机模块，并使用目标体系结构的标准助记符集。代表目标环境的C基准可以随后进行编译，组装和虚拟执行，以生成各种架构性能指标，包括比特预算，比特流量和静态/动态指令数量。通过将来自两个现有体系结构的测量数据与通过直接在ISAS中对这些体系结构建模而获得的数据进行比较，已验证了该方法。以ISAS为模型的一系列全面的建筑案例研究进一步证明了该方法在执行有效的建筑评估中的适用性和实用性。

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