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The design, processing and characterization of II-VI semiconductor devices for infrared optoelectronic applications.

机译：用于红外光电应用的II-VI半导体器件的设计，处理和表征。

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摘要

The long term objective of this research work is to address the challenges that confront the further development of II-VI semiconductor electrical and optical devices for integrated optoelectronic circuit (IOEC) applications. Specifically, the goal has been to develop device design criteria, device processing technologies, and to implement an electrical and optical characterization system in order to establish an IOEC technology in the HgCdMnTe materials system. The II-VI semiconducting materials have unique and interesting properties that offer a wealth of potential optoelectronic applications that span the ultraviolet through the long wavelength infrared spectrum. The challenges that have prevented the development of devices in these materials can be divided into three categories: (1) materials limitations, (2) device processing and characterization challenges, and (3) the lack of published device fabrication technologies. This research work has successfully addressed these issues and resulted in first demonstrations of several II-VI semiconductor devices such as Schottky barriers, p-n junctions, and field-effect transistors (FETs).;The materials used in this work were grown in Dr. J. F. Schetzina's Solid State Laboratory where a recent breakthrough in the controlled substitutional doping of II-VI materials, photoassisted molecular beam epitaxy (MBE), has been used to synthesize device quality epitaxial material. A low-temperature (;The following first demonstrations have been accomplished: (1) CdTe metal-semiconductor FETs (MESFETs), (2) CdMnTe Schottky barrier diodes, (3) CdMnTe MESFETs, (4) HgCdTe metal-insulator-semiconductor FETs, (5) HgCdTe modulation-doped quantum-well FETs and (6) CdTe:As-CdTe:In p-n junctions grown in situ by photoassisted MBE. In addition, the low-temperature processing technology has been used to explore selective area surface passivation, insulator deposition, and epitaxy.;The successes of these first demonstration devices indicate that monolithically-integrated IOECs based on II-VI semiconductors may soon be possible.
机译：这项研究工作的长期目标是解决面向集成光电电路（IOEC）应用的II-VI半导体电气和光学器件的进一步发展所面临的挑战。具体而言，目标是开发设备设计标准，设备处理技术，并实施电学和光学表征系统，以便在HgCdMnTe材料系统中建立IOEC技术。 II-VI型半导体材料具有独特而有趣的特性，这些特性提供了许多潜在的光电应用，这些应用涵盖了紫外线到长波长红外光谱的范围。阻碍这些材料中的器件开发的挑战可分为三类：（1）材料局限性；（2）器件加工和表征挑战；以及（3）缺乏已发布的器件制造技术。这项研究工作已成功解决了这些问题，并首次展示了几种II-VI半导体器件，例如肖特基势垒，pn结和场效应晶体管（FET）。 Schetzina的固态实验室在II-VI材料的受控替代掺杂中的最新突破，即光辅助分子束外延（MBE），已被用于合成器件质量的外延材料。低温（;已完成以下首次演示：（1）CdTe金属半导体FET（MESFET），（2）CdMnTe肖特基势垒二极管，（3）CdMnTe MESFET，（4）HgCdTe金属绝缘子半导体FET ，（5）HgCdTe调制掺杂量子阱FET和（6）CdTe：As-CdTe：In在通过光辅助MBE原位生长的pn结中。此外，低温处理技术已用于探索选择性区域表面钝化，绝缘体沉积和外延。；这些第一批演示设备的成功表明，基于II-VI半导体的单片集成IOEC可能很快成为可能。

著录项

  • 作者

    Dreifus, David Lane.;

  • 作者单位

    North Carolina State University.;

  • 授予单位 North Carolina State University.;
  • 学科 Electrical engineering.;Condensed matter physics.;Materials science.
  • 学位 Ph.D.
  • 年度 1989
  • 页码 156 p.
  • 总页数 156
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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