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Hardware for function evaluation schemes using higher order polynomial and table-based algorithms.

机译:使用高阶多项式和基于表的算法进行功能评估的硬件。

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摘要

This dissertation presents two significant contributions for computing elementary function. The first contribution is a method for computing elementary function using the optimized memory requirements along with truncated multipliers, squarers and cubers for designing linear, quadratic and cubic interpolators. The proposed method optimizes the initial coefficient values found using a Chebyshev series approximation and minimizes the maximum absolute error of the interpolator output. The resulting designs can be utilized for any approximation for functions up to and beyond 53-bits (IEEE double precision significant) of precision with a reduced requirement for table lookup sizes. Designs for linear, quadratic and cubic interpolators that implement reciprocal, square root, reciprocal square root and sine are presented and analyzed, and the method can be extended easily to other functions. Overall, the first part of the dissertation demonstrates a method to optimize a given accuracy for computation that employ hardware units that may have different precision limitations. Area, delay and power estimates are given for 16, 24 and 32-bit interpolators that compute the reciprocal function targeting a 65nm CMOS technology from IBM. Results indicate the proposed method uses smaller arithmetic units and has reduced lookup table sizes than previously proposed methods. This method can be employed within any system that has similar truncation and rounding effects within multiple logic units.;The second contribution is an optimization method for computing an optimum lookup table size for two well-known look up table elementary function approximation methods: Symmetric Table Additional Method (STAM) and Multipartite Table Method (MTM). Using a discrete optimization algorithm called Leapfrogging, this part utilizes a method to find the best decomposition of the coefficients to optimize look up table sizes. The resulting designs can easily be utilized for any approximation for functions up 24-bits of precision with significantly smaller requirements for lookup table sizes. Results show that the proposed optimized method is able to achieve higher memory efficiency than the best existing MTM.
机译:本文为计算基本函数提供了两个重要的贡献。第一个贡献是一种用于计算基本函数的方法,该方法使用优化的内存要求以及用于设计线性,二次和三次插值器的截断乘法器,平方器和立方器来计算。所提出的方法优化了使用切比雪夫序列逼近法找到的初始系数值,并使内插器输出的最大绝对误差最小。最终的设计可用于精度达到或超过53位(IEEE双精度有效)的函数的任何近似,并且减少了对表查找大小的要求。给出并分析了实现倒数,平方根,倒数平方根和正弦的线性,二次和三次插值器的设计,该方法可以轻松扩展到其他功能。总体而言,本文的第一部分演示了一种优化给定精度以进行计算的方法,该方法采用可能具有不同精度限制的硬件单元。给出了针对16位,24位和32位插值器的面积,延迟和功率估计,这些插值器针对IBM的65nm CMOS技术计算了倒数函数。结果表明,与以前提出的方法相比,提出的方法使用了较小的算术单元,并减小了查找表的大小。该方法可以在多个逻辑单元中具有类似截断和舍入效果的任何系统中使用。第二点是优化方法,用于为两种众所周知的查找表基本函数近似方法计算最佳查找表大小:对称表附加方法(STAM)和多部分表方法(MTM)。使用称为Leapfrogging的离散优化算法,该部分利用一种方法来找到系数的最佳分解,以优化查找表的大小。生成的设计可以轻松地用于精度高达24位的函数的任何近似中,并且对查找表大小的要求要小得多。结果表明,所提出的优化方法比现有的最佳MTM能够实现更高的存储效率。

著录项

  • 作者

    Sadeghian, Masoud.;

  • 作者单位

    Oklahoma State University.;

  • 授予单位 Oklahoma State University.;
  • 学科 Electrical engineering.
  • 学位 Ph.D.
  • 年度 2015
  • 页码 107 p.
  • 总页数 107
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

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