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Incorporating the effect of delay variability in path based delay testing.

机译：在基于路径的延迟测试中纳入延迟可变性的影响。

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摘要

Delay variability poses a formidable challenge in both design and test of nanometer circuits. While process parameter variability is increasing with technology scaling, as circuits are becoming more complex, the dynamic or vector dependent variability is also increasing steadily. In this research, we develop solutions to incorporate the effect of delay variability in delay testing. We focus on two different applications of delay testing.;In the first case, delay testing is used for testing the timing performance of a circuit using path based fault models. We show that if dynamic delay variability is not accounted for during the path selection phase, then it can result in targeting a wrong set of paths for test. We have developed efficient techniques to model the effect of two different dynamic effects namely multiple-input switching noise and coupling noise. The basic strategy to incorporate the effect of dynamic delay variability is to estimate the maximum vector delay of a path without being too pessimistic.;In the second case, the objective was to increase the defect coverage of reliability defects in the presence of process variations. Such defects cause very small delay changes and hence can easily escape regular tests. We develop a circuit that facilitates accurate control over the capture edge and thus enable faster than at-speed testing. We further develop an efficient path selection algorithm that can select a path that detects the smallest detectable defect at any node in the presence of process variations.
机译：延迟可变性在纳米电路的设计和测试中提出了巨大的挑战。尽管工艺参数的可变性随技术规模的增长而增加，但随着电路变得越来越复杂，动态或矢量相关的可变性也在稳步增加。在这项研究中，我们开发了在延迟测试中纳入延迟可变性影响的解决方案。我们专注于延迟测试的两种不同应用。在第一种情况下，延迟测试用于使用基于路径的故障模型来测试电路的时序性能。我们表明，如果在路径选择阶段未考虑动态延迟可变性，则可能导致针对错误的路径集进行测试。我们已经开发出有效的技术来对两种不同动态效果的影响建模，即多输入开关噪声和耦合噪声。结合动态延迟可变性影响的基本策略是在不过于悲观的情况下估计路径的最大矢量延迟。在第二种情况下，目标是在存在工艺变化的情况下增加可靠性缺陷的缺陷覆盖率。这样的缺陷会导致很小的延迟变化，因此很容易逃脱常规测试。我们开发了一种电路，该电路有助于对捕获边缘进行精确控制，因此比全速测试更快。我们进一步开发了一种有效的路径选择算法，该算法可以选择一种在存在过程变化的情况下在任何节点上检测最小可检测缺陷的路径。

著录项

  • 作者

    Tayade, Rajeshwary G.;

  • 作者单位

    The University of Texas at Austin.;

  • 授予单位 The University of Texas at Austin.;
  • 学科 Engineering Electronics and Electrical.
  • 学位 Ph.D.
  • 年度 2009
  • 页码 180 p.
  • 总页数 180
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类
  • 关键词

  • 入库时间 2022-08-17 11:38:19

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