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Thermal modeling and management of microprocessors.

机译:微处理器的热建模和管理。

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摘要

The most recent, and arguably one of the most difficult obstacles to the exponential growth in transistor density predicted by Moore's Law is that of removing the large amount of heat generated within the tiny area of a microprocessor. The exponential increase in power density and its direct relation to on-chip temperature have, in recent processors, led to very high cooling costs. Since temperature also has an exponential effect on lifetime reliability and leakage power, it has become a first-class design constraint in microprocessor development akin to performance.;This dissertation describes work to address the temperature challenge from the perspective of the architecture of the microprocessor. It proposes both the infrastructure to model the problem and several mechanisms that form part of the solution. This research describes HotSpot, an efficient and extensible microarchitectural thermal modeling tool that is used to guide the design and evaluation of various thermal management techniques. It presents several Dynamic Thermal Management (DTM) schemes that distribute heat both over time and space by controlling the level of computational activity. Processor temperature is not only a function of the power density but also the placement and adjacency of hot and cold functional blocks, determined by the floorplan of the microprocessor. Hence, this dissertation also explores various thermally mitigating placement choices available within a single core and across multiple cores of a microprocessor. It does so through the development of HotFloorplan, a thermally-aware microarchitectural floorplanner. Finally, through an analytical framework, this research also focuses on the spatial (size) granularity at which thermal management is important. If regions of very high power density are small enough, they do not cause hot spots. The granularity study quantifies this relationship and illustrates it using three different microarchitectural examples.
机译:摩尔定律所预测的晶体管密度指数增长的最新最困难的障碍之一就是消除微处理器微小区域内产生的大量热量。在最近的处理器中,功率密度的指数增长及其与芯片温度的直接关系导致了很高的冷却成本。由于温度也会对寿命可靠性和泄漏功率产生指数影响,因此它已成为类似于性能的微处理器开发中的一流设计约束。本文从微处理器的架构角度描述了应对温度挑战的工作。它提出了用于建模问题的基础结构以及构成解决方案一部分的几种机制。这项研究描述了HotSpot,这是一种高效且可扩展的微体系结构热建模工具,可用于指导各种热管理技术的设计和评估。它提出了几种动态热管理(DTM)方案,它们通过控制计算活动的水平在时间和空间上分配热量。处理器温度不仅是功率密度的函数,而且还是热功能块和冷功能块的位置和相邻性的函数,其由微处理器的布局确定。因此,本论文还探讨了在单个内核内以及在微处理器的多个内核之间可用的各种散热缓解选择。它是通过开发HotFloorplan(热感知微体系结构平面规划器)来实现的。最后,通过分析框架,本研究还关注热管理十分重要的空间(尺寸)粒度。如果功率密度很高的区域足够小,则它们不会引起热点。粒度研究量化了这种关系,并使用三个不同的微体系结构示例对其进行了说明。

著录项

  • 作者

    Sankaranarayanan, Karthik.;

  • 作者单位

    University of Virginia.;

  • 授予单位 University of Virginia.;
  • 学科 Computer Science.
  • 学位 Ph.D.
  • 年度 2009
  • 页码 158 p.
  • 总页数 158
  • 原文格式 PDF
  • 正文语种 eng
  • 中图分类 自动化技术、计算机技术;
  • 关键词

  • 入库时间 2022-08-17 11:38:26

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