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FPGA-based Accelerators for Convolutional Neural Networks on Embedded Devices

机译：基于FPGA的嵌入式设备卷积神经网络的加速器

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作者
Perera Miro, Jordi.;
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作者单位

University of Colorado Colorado Springs.;

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授予单位 University of Colorado Colorado Springs.;
学科
学位 M.S.
年度 2020
页码 112 p.
总页数 112
原文格式 PDF
正文语种 eng
中图分类 AAI27993620;
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专利

1. A survey of FPGA-based accelerators for convolutional neural networks [J] . Neural computing & applications . 2020,第4期

机译：基于FPGA的卷积神经网络的加速器调查
2. FFConv: An FPGA-based Accelerator for Fast Convolution Layers in Convolutional Neural Networks [J] . AFZAL AHMAD, MUHAMMAD ADEEL PASHA ACM Transactions on Embedded Computing Systems . 2020,第2期

机译：FFCONV：卷积神经网络中的快速卷积层的基于FPGA的加速器
3. WinoNN: Optimizing FPGA-Based Convolutional Neural Network Accelerators Using Sparse Winograd Algorithm [J] . Wang Xuan, Wang Chao, Cao Jing, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems . 2020,第11期

机译：WINONN：使用稀疏Winograd算法优化基于FPGA的卷积神经网络加速器
4. Improving Performance Estimation for FPGA-Based Accelerators for Convolutional Neural Networks [C] . Martin Ferianc, Hongxiang Fan, Ringo S. W. Chu, International Symposium on Applied Reconfigurable Computing . 2020

机译：提高卷积神经网络的FPGA加速器性能估计
5. Artificial Neural Network Optimizations for FPGA-Based Accelerators: Exploration of Low Numeric Precision, Sparsity, and Evolutionary Algorithms [D] . Colangelo, Philip . 2020

机译：基于FPGA的促进者的人工神经网络优化：低数字精度，稀疏性和进化算法的探索
6. Mapping Neural Networks to FPGA-Based IoT Devices for Ultra-Low Latency Processing [O] . Maciej Wielgosz, Michał Karwatowski 2019

机译：将神经网络映射到基于FPGA的IoT设备以进行超低延迟处理
7. FPGA-Based Inter-layer Pipelined Accelerators for Filter-Wise Weight-Balanced Sparse Fully Convolutional Networks with Overlapped Tiling [O] . Masayuki Shimoda, Youki Sada, Hiroki Nakahara 2021

机译：基于FPGA的层间流水线加速器，用于滤波器的重量平衡的稀疏完全卷积网络，具有重叠的平铺

FPGA-based Accelerators for Convolutional Neural Networks on Embedded Devices

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