In this paper,we propose routing algorithms for permutation-reverse and permutation-rotation operations based on Inverse Butterfly and Butterfly Networks respectively.The algorithms utilize self-routing and self-reconfigurable characteristics of the networks,and are capable of completing all reverse and rotation operations of arbitrary permutation-P.Their computational complexities are low and the hardware implementations are simple.Following this,we extend the functions of the previous permutation operations based on the networks with our proposed algorithms.And then,permutation-reverse,permutation-rotation and permutation-reverse-rotation hardware units are developed and synthesized in SMIC 65-nm process.The results show that when the reverse operations are extended in previous designs,the area of the original circuits is only increased by 6％,and the latency of original circuits is almost not affected.In addition,when the rotation and reverserotation operations are extended in previous designs,the area of the original circuits is increased by 18 ％ and 21％,and the latency of them is increased by 30％,while the functions of original circuits are expanded 2 times.%本文利用Inverse Butterfly/Butterfly多级动态互连网络的自路由和可重排特性,提出了基于该网络的置换-逆序和置换-移位选路算法.它们都能够对所有一次通过该网络的任意置换结果动态地完成逆序和移位操作,且算法复杂度低,硬件实现简洁.进一步,将本文提出的算法对基于该网络设计的置换操作进行了功能扩展,分别构建了置换-逆序、置换-移位以及置换-逆序-移位硬件单元.并将它们在SMIC 65nm工艺下进行了综合,结果表明:当在以往研究成果上扩展逆序操作时,硬件电路面积仅增加约6％且几乎不影响原架构的延迟;当在以往研究成果上扩展移位和逆序-移位操作时,原架构以18％和21％的面积增加值和30％的延迟增加值,实现了功能性2倍的提升.
展开▼
