A low on-resistance buried current path SOI p-channel LDMOS compatible with n-channel LDMOS

Zhou Kun; Luo Xiao-Rong; Fan Yuan-Hang; Luo Yin-Chun; Hu Xia-Rong; Zhang Bo

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A low on-resistance buried current path SOI p-channel LDMOS compatible with n-channel LDMOS

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摘要

A novel low specific on-resistance (Ron,sp) silicon-on-insulator (SOI) p-channel lateral double-diffused metal-oxide semiconductor (pLDMOS) compatible with high voltage (HV) n-channel LDMOS (nLDMOS) is proposed.The pLDMOS is built in the N-type SOI layer with a buried P-type layer acting as a current conduction path in the on-state (BP SOI pLDMOS).Its superior compatibility with the HV nLDMOS and low voltage (LV) complementary metal-oxide semiconductor (CMOS) circuitry which are formed on the N-SOI layer can be obtained.In the off-state the P-buried layer built in the N-SOI layer causes multiple depletion and electric field reshaping,leading to an enhanced (reduced) surface field (RESURF)effect.The proposed BP SOI pLDMOS achieves not only an improved breakdown voltage (BV) but also a significantly reduced Ron,sp.The BV of the BP SOI pLDMOS increases to 319 V from 215 V of the conventional SOI pLDMOS at the same half cell pitch of 25 μm,and Ron,sp decreases from 157 mΩ·cm2 to 55 mΩ·cm2.Compared with the PW SOI pLDMOS,the BP SOI pLDMOS also reduces the Ron,sp by 34％ with almost the same BV.

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来源
《中国物理：英文版》 |2013年第6期|542-548|共7页
作者
Zhou Kun; Luo Xiao-Rong; Fan Yuan-Hang; Luo Yin-Chun; Hu Xia-Rong; Zhang Bo;
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作者单位

State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China;

State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China;

State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China;

State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China;

State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China;

State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China;

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A low on-resistance buried current path SOI p-channel LDMOS compatible with n-channel LDMOS

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