For RTL design cannot meet the requirement of the speed of System on Chip(SoC), this paper presents a fast and accurate processor hybrid model based on Electronic System Level(ESL). It uses the proprietary 32 bit embedded microprocessor C*CORE340 based on ESL design methodology. For this target the Instruction Set Simulator(ISS) and Cache adopt the different abstraction layers to construct. Experimental results show that the simulation speeds of hybrid model is a least 10 times faster than that of RTL model, and the less than 10% error rate simulation accuracy is gotten.%RTL设计不能满足片上系统对仿真速度的要求.为此,提出一种基于电子系统级快速精确的处理器混合模型.以32位嵌入式微处理器C*CORE340为例,采用不同的抽象层次对指令集仿真器和Cache进行构建.实验结果表明,与RTL级模型相比,该模型的仿真速度至少快10倍,仿真精度误差率低于10％.
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