Designed a six-channel recording to measure the DC pulse signal with a resolution of 8bit, 10MHz sampling rate per channel solid-state storage system that the FPGA as the core controller, mainly to complete the multi-channel selection control, AD and sampling frequency conversion control, FIFO data buffer and control NAND flash memory for data storage. The modular design, interior design using VHDL language, software environment in ISE9.1 process control hardware through the AD and control sampling frequency control memory read and write, erase operations. While taking advantage of FPGA design within the built-in 8-bit FIFO RAM data high-speed buffer.%设计了一款可以测量记录6通道直流脉冲信号、分辨率8bit、每通道10MHz采样率的固态存储系统,该系统以FPGA作为核心控制器,主要完成多通道选择控制、AD采样频率及转换控制、数据缓冲FIFO以及控制NAND闪存进行数据存储的功能。系统采用模块化设计,内部采用VHDL语言设计,在ISE9.1软件环境下通过程序控制硬件实现AD采样频率的控制和控制闪存的读写、擦除操作。同时利用FPGA内部自带的RAM设计8位的FIFO实现数据的高速缓冲。
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