For overcoming the problem of timing synchronization in the digital receiver, this paper proposes an algorithm for the timing synchronization that is easy to implement by using the FPGA. By computing the instantaneous power of the baseband over-sampled signals in time domain, this algorithm can determine fast the sampling point with respect to the maximum of the instantaneous power, and this point is namely the optimum sampling point. Finally, by taking an example of QPSK signals, the algorithm is implemented on the FPGA platform, whose implementation results prove this proposed algorithm to be of effectiveness. And this algorithm can perform directly in time domain, take advantages of fast speed, easy implementation with FPGA and others, which can be also applied to other digital signals for timing synchronization.%为解决数字接收系统的定时同步问题，提出了一种易于FPGA实现的数字接收系统定时同步算法。该算法通过计算时域基带过采样信号的瞬时功率，可以快速确定瞬时功率最大值所对应的样点，该样点即为最佳采样点。最后，以QPSK信号为例，在FPGA平台上对算法进行了实现，实现结果证明了该算法的有效性。该算法直接在时域进行，具有速度快、易于FPGA实现等优点，亦可用于对其他数字信号进行定时同步。
展开▼
