为了有效地改善滤波器的不可调频率系统性能,降低FPGA滤波器资源的消耗,提出基于FPGA的高效可调频率滤波器.该方法首先对可调频率滤波器进行硬件平台设计,硬件平台由单片机模块、FPGA波形模块、幅度模块、数字模型转换模块、低通滤波转换模块以及输入键盘模块和液晶显示屏模块构成.核心模块由MCU提供可调频率控制,以DDS技术产生的波形信号为依据,确定滤波器的信号强度,最后采用分布算法完成滤波器软件设计.实验证明,所提方法能够有效提高可调频率滤波器的准确度.%In order to effectively improve the system performance of the filter with non-adjustable frequency,and reduce the resource consumption of the filter based on FPGA,an efficient filter with adjustable frequency based on FPGA is proposed. The hardware platform is designed for the filter with adjustable frequency,which is composed of the MCU module,FPGA wave-form module,amplitude module,digital model conversion module,low-pass filter conversion module,keyboard input module and LCD module. The MCU controls the adjustable frequency for the core module. On the basis of the waveform signal generated by DDS technology ,the signal strength of the filter is determined. The distributed algorithm is used to realize the software de-sign of the filter. The experimental results show that the proposed method can improve the accuracy of the filter with adjustable frequency effectively.
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