根据直接数字频率合成器(DDS)工作原理,介绍了一种基于FPGA的任意分频系数的分频器的设计,该分频器能实现分频系数和占空比.通过Verilog语言进行了编译并且给出了仿真图.该设计中的分频器没有竞争冒险,可移植性强,占用的FPGA资源少.本设计在友晶公司DE0的开发板上可完全实现,结果表明设计是正确和可行的.分频器在FPGA开发设计中应用非常广泛,故本设计具有很强的实用价值.%The design of a FPGA-based frequency divider with arbitrary frequency coefficients is introduced on the basis of the direct digital frequency synthesizer ( DDS ) principle, the divider can realize frequency coefficient and duty ratio. The compilation is achieved with Verilog language. The simulation diagrams are provided in this paper. The design of the frequency divider is no competition risk adventure. It has strong portability and less occupancy of FPGA resource. The design can be fully realized on the DEO development board made by Youjing Company. The application result shows that the design is correct and feasible. The frequency divider in FPGA development design is widely used, so this design has a certain practical value.
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