A FPGA scheme of Viterbi decoder for cirrocumulus code is designed based on the state machine technique.The trellis graph of the convolutional code is analyzed,and the Viterbi decoding algorithm is simplified based on the feature its state transferring matrix.The key process of the decoder is devised to three states which is compute,compare and export,the transfer of which is controlled by the counter.Three decoder structures are derived according to different adder multiplexing methods,the resources consumption is analyzed for each structure,all of which provide choosing basis for flexible designs.Finally,the decoder is simulated on Modelsim software,the timing sequence and decoding result of which is coherent with expect proving that the decoder is valid.%基于状态机设计了FPGA平台的卷积码Viterbi译码器.分析了该卷积码的格型图.利用其状态转移矩阵特点对Viterbi译码算法进行了简化.将译码器核心工作过程分为计算、比较、输出三个状态,通过计数器控制状态的转换.针对加法器不同的复用方法提出三种结构的译码器,并对不同结构的资源消耗情况进行了分析比较,这三种结构为实现更灵活的设计提供了选择依据.最后利用Modelsim软件对其进行了仿真,时序和译码结果和预期一致,证明该译码器的有效性.
展开▼
