随着GNSS接收机应用的不断深入,其对系统功耗、体积等性能的要求越来越高.大规模集成电路芯片如现场可编程逻辑门阵列(FPGA)和高速数字信号处理器(DSP)等在嵌入式GNSS接收机设计中得到广泛应用.卫星信号数字处理是接收机的核心部件之一,提出了一种基于FPGA与DSP模块化的嵌入式接收机的基带信号处理系统设计.利用FPGA完成基带相关器的设计,并由DSP实现卫星信号的信号处理和定位导航解算.通过静态测试试验,说明所设计的GNSS接收机具有体积小、功耗低和实时性强等特点.%Along with the deepening of GNSS receiver application, the performance requirements for power con-sumption and volume is higher and higher, the large-scale integrated circuit chips such as field-programmable gate arrays (FPGA) and high performance digital signal processor (DSP) are widely used in embedded GNSS receiver. A design of baseband signal processing of embedded receiver based on FPGA + DSP is introduced, and one of core design is the digital signal processing unit. FPGA is used to carry correlation. And DSP is designed to achieve pro-cessing satellite signal and the navigation data. System static test show that this receiver has characteristic of littler bulk, lower power and real-time.
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