This paper introduces a clock recovery algorithm which is suitable for the realization of hardware digital circuits. It mainly describes the principle of the algorithm and lists the implementation schemes of key modules in the program. At present, the scheme has been implemented on device EP4CGX150DF27I7 of Altera FPGA .%文章介绍了一种适用于硬件数字电路实现的时钟恢复算法，主要描述该算法的原理，并列出关键模块的实现方案。目前该方案已经在Altera的FPGA器件EP4CGX150DF27I7上实现。
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