class='kwd-title'>Keywords: Fractional elements,'/> Realization of fractional-order capacitor based on passive symmetric network
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Realization of fractional-order capacitor based on passive symmetric network

机译：基于无源对称网络的分数阶电容器的实现

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class="kwd-title">Keywords: Fractional elements, Cole-Impedance model, Minimax technique, Wien oscillator, Symmetric network, Monte Carlo analysis class="head no_bottom_margin" id="ab015title">AbstractIn this paper, a new realization of the fractional capacitor (FC) using passive symmetric networks is proposed. A general analysis of the symmetric network that is independent of the internal impedance composition is introduced. Three different internal impedances are utilized in the network to realize the required response of the FC. These three cases are based on either a series RC circuit, integer Cole-impedance circuit, or both. The network size and the values of the passive elements are optimized using the minimax and least mth optimization techniques. The proposed realizations are compared with well-known realizations achieving a reasonable performance with a phase error of approximately 2o. Since the target of this emulator circuit is the use of off-the-shelf components, Monte Carlo simulations with 5% tolerance in the utilized elements are presented. In addition, experimental measurements of the proposed capacitors are preformed, therein showing comparable results with the simulations. The proposed realizations can be used to emulate the FC for experimental verifications of new fractional-order circuits and systems. The functionality of the proposed realizations is verified using two oscillator examples: a fractional-order Wien oscillator and a relaxation oscillator.
机译：<！-fig ft0-> <！-fig @ position =“ anchor” mode =文章f4-> <！-fig mode =“ anchred” f5-> <！-fig / graphic | fig / alternatives / graphic mode =“ anchored” m1-> class =“ kwd-title”>关键字：分形元素，科尔阻抗模型，Minimax技术，维恩振荡器，对称网络，蒙特卡洛分析<本文提出了一种利用无源对称网络实现分数电容器的新方法。介绍了独立于内部阻抗成分的对称网络的一般分析。网络中使用了三种不同的内部阻抗来实现FC所需的响应。这三种情况基于串联RC电路，整数Cole-阻抗电路或两者。使用minimax和最小 m th 优化技术。将提出的实现与众所周知的实现进行比较，这些实现以合理的性能实现了相位误差约为 2 o < / mrow> 。由于此仿真器电路的目标是使用现成的组件，因此使用 5 ％ 在所使用元素中的公差。另外，对所提出的电容器进行了实验测量，其中显示了与仿真相当的结果。提出的实现可用于仿真FC，以对新的分数阶电路和系统进行实验验证。利用两个振荡器示例验证了所提出实现的功能：分数阶维恩振荡器和张弛振荡器。

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