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首页> 外文期刊>ACM transactions on reconfigurable technology and systems >High-Level Abstractions and Modular Debugging for FPGA Design Validation
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High-Level Abstractions and Modular Debugging for FPGA Design Validation

机译：用于FPGA设计验证的高级抽象和模块化调试

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摘要

Design validation is the most time-consuming task in the FPGA design cycle. Although manufacturers and third-party vendors offer a range of tools that provide visibility and control of the different stages of a design, many require that the design be fully re-implemented for even simple parameter modifications or do not allow the design to be run at full speed. Designs are typically first modeled using a high-level language then later rewritten in a hardware description language, first for simulation and then later modified for synthesis. IP and third-party cores may differ during these final two stages complicating development and validation. The developed approach provides two means of directly validating synthesized hardware designs. The first allows the original high-level model written in C or C++ to be directly coupled to the synthesized hardware, abstracting away the traditional gate-level view of designs. A high-level programmatic interface allows the synthesized design to be validated directly by the software reference model. The second approach provides an alternative view to FPGAs within the scope of a traditional software debugger. This debug framework leverages partially reconfigurable regions to accelerate the modification of dynamic, software-like breakpoints for low-level analysis and provides a automatable, scriptable, command-line interface directly to a running design on an FPGA.
机译：设计验证是FPGA设计周期中最耗时的任务。尽管制造商和第三方供应商提供了范围广泛的工具，以提供对设计不同阶段的可见性和控制力，但许多工具仍要求完全重新实现设计以进行简单的参数修改，或者不允许在设计中运行全速。通常首先使用高级语言对设计进行建模，然后使用硬件描述语言进行重写，首先进行仿真，然后进行修改以进行综合。在最后两个阶段，IP和第三方内核可能会有所不同，这会使开发和验证变得复杂。开发的方法提供了直接验证综合硬件设计的两种方法。第一个方法允许将用C或C ++编写的原始高级模型直接耦合到合成硬件，从而抽象化了传统的门级设计视图。高级编程接口允许综合设计直接由软件参考模型验证。第二种方法在传统软件调试器的范围内为FPGA提供了另一种视图。该调试框架利用部分可重新配置的区域来加快对类似于软件的动态断点的修改，以进行低级分析，并直接向FPGA上的正在运行的设计提供可自动化，可编写脚本的命令行界面。

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