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首页> 外文期刊>Advanced Functional Materials >Large-Area Schottky Barrier Transistors Based on Vertically Stacked Graphene-Metal Oxide Heterostructures
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Large-Area Schottky Barrier Transistors Based on Vertically Stacked Graphene-Metal Oxide Heterostructures

机译：基于垂直堆叠的石墨烯-金属氧化物异质结构的大面积肖特基势垒晶体管

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摘要

The fabrication of all-transparent flexible vertical Schottky barrier (SB) transistors and logic gates based on graphene-metal oxide-metal heterostructures and ion gel gate dielectrics is demonstrated. The vertical SB transistor structure is formed by (i) vertically sandwiching a solution-processed indium-gallium-zinc-oxide (IGZO) semiconductor layer between graphene (source) and metallic (drain) electrodes and (ii) employing a separate coplanar gate electrode bridged with a vertical channel through an ion gel. The channel current is modulated by tuning the Schottky barrier height across the graphene-IGZO junction under an applied external gate bias. The ion gel gate dielectric with high specific capacitance enables modulation of the Schottky barrier height at the graphene-IGZO junction over 0.87 eV using a voltage below 2 V. The resulting vertical devices show high current densities (18.9 A cm(-2)) and on-off current ratios (>10(4)) at low voltages. The simple structure of the unit transistor enables the successful fabrication of low-power logic gates based on device assemblies, such as the NOT, NAND, and NOR gates, prepared on a flexible substrate. The facile, large-area, and room-temperature deposition of both semiconducting metal oxide and gate insulators integrates with transparent and flexible graphene opens up new opportunities for realizing graphene-based future electronics.
机译：演示了基于石墨烯-金属氧化物-金属异质结构和离子凝胶栅极电介质的全透明柔性垂直肖特基势垒（SB）晶体管和逻辑门的制造。垂直SB晶体管结构是通过（i）将固溶处理过的铟镓锌氧化物（IGZO）半导体层垂直夹在石墨烯（源极）和金属（漏极）电极之间以及（ii）采用单独的共面栅电极形成的通过离子凝胶与垂直通道桥接。通过在施加的外部栅极偏置下调节跨石墨烯-IGZO结的肖特基势垒高度来调制沟道电流。具有高比电容的离子凝胶栅极电介质能够使用低于2 V的电压将石墨烯-IGZO结处的肖特基势垒高度调制到0.87 eV以上。所得垂直器件显示出高电流密度（18.9 A cm（-2））和低压时的开-关电流比（> 10（4））。单位晶体管的简单结构使得能够基于在柔性基板上制备的器件组合（例如NOT，NAND和NOR门）成功地制造低功率逻辑门。半导体金属氧化物和栅极绝缘体的简便，大面积和室温沉积与透明且柔性的石墨烯集成在一起，为实现基于石墨烯的未来电子产品提供了新的机遇。

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