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首页> 外文期刊>Applied Computational Electromagnetics Society journal >Coplanar Waveguide Slot-coupled K_a-band Patch Antenna for Integration with Wafer-scale Beam-steering MEMS Control Board
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Coplanar Waveguide Slot-coupled K_a-band Patch Antenna for Integration with Wafer-scale Beam-steering MEMS Control Board

机译：共面波导缝隙耦合的K_a波段贴片天线，用于与晶圆级波束控制MEMS控制板集成

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摘要

A coplanar waveguide (CPW) slot-coupled Ka-band patch antenna is designed, constructed and tested for subsequent integration with a wafer-scale MEMS-switched antenna array beam-steering control board. The antenna is designed for fabrication on a high resistivity silicon (HRS) wafer (ε_r ≈ 11.8) for operation with 25-30 GHz satellite communication systems. A simulated 10 dB return loss bandwidth of 2.96 GHz (9.8 %) is achieved with a 4.6 dB peak gain and 110° half-power beamwidth (HPBW). A scaled prototype at 6 GHz is constructed on RT/Duroid 6010 substrate (ε_r ≈ 10.2) and yields a measured bandwidth of 360 MHz (6.0 %) and a peak gain of 4 dB. A CPW feedline / slot misalignment sensitivity test is conducted through simulations to investigate the effects that fabrication errors may have on antenna performance during wafer-scale integration of the patch antenna onto the HRS substrate. Simulation results show that slot misalignment less man 200-400 μm should only minimally affect antenna performance, with the most significant degradation being a 2.5 - 4.0 % drop in antenna bandwidth. The successful design of this patch antenna demonstrates a compact, efficient method for integration of a CPW slot-coupled K_a-band patch antenna onto a wafer-scale MEMS control board without the need for additional substrate layers or feedline interconnects, minimizing total system weight and fabrication complexity.
机译：设计，构造和测试了共面波导（CPW）缝隙耦合的Ka波段贴片天线，用于随后与晶圆级MEMS开关天线阵列波束控制控制板的集成。该天线设计用于在高电阻率的硅（HRS）晶圆（ε_r≈11.8）上制造，以与25-30 GHz卫星通信系统一起工作。在4.6 dB峰值增益和110°半功率波束宽度（HPBW）的情况下，获得了2.96 GHz（9.8％）的模拟10 dB回波损耗带宽。在RT / Duroid 6010基板（ε_r≈10.2）上构建了6 GHz的缩放原型，其测量带宽为360 MHz（6.0％），峰值增益为4 dB。通过仿真进行CPW馈线/缝隙未对准灵敏度测试，以研究在贴片天线的晶圆级集成到HRS基板上的过程中，制造错误可能对天线性能产生的影响。仿真结果表明，较少的缝隙未对准（200-400μm）只会对天线性能产生最小的影响，最显着的降低是天线带宽下降2.5-4.0％。这种贴片天线的成功设计展示了一种紧凑，有效的方法，可将CPW缝隙耦合的K_a波段贴片天线集成到晶圆级MEMS控制板上，而无需额外的基板层或馈线互连，从而最大程度地降低了系统总重量和制造复杂度。

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