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首页> 外文期刊>Arabian Journal for Science and Engineering >Implementation and Performance Analysis of True Random Number Generator on FPGA Environment by Using Non-periodic Chaotic Signals Obtained from Chaotic Maps
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Implementation and Performance Analysis of True Random Number Generator on FPGA Environment by Using Non-periodic Chaotic Signals Obtained from Chaotic Maps

机译：利用混沌映射得到的非周期性混沌信号在FPGA环境下实现真随机数发生器及其性能分析

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摘要

In this study, FPGA implementation of a hybrid random number generator (HRNG) based on digital design techniques is given. The ring oscillators (ROs) are used as the noise source of HRNG, and true randomness is obtained by sampling jitter signals forming on the oscillators. The statistical quality and reliability of random number generators that used jitter as source of true randomness alone are often cryptographically insufficient. For this reason, one-dimensional discrete-time chaotic maps such as quadratic map, logistic map and Bernoulli shift map are benefited in order for HRNG to meet these cryptographic requirements. In contrast to many studies in the literature, non-periodic signals derived from chaotic systems of a powerful source of entropy are used instead of periodic signals for the sampling of jitter signals in the system. Depending on the usage of chaotic systems, output bit rate and reliability of high generator model that does not need post-processing techniques and is easily applicable to digital devices are obtained. The hybrid system is tested in total six different scenarios for two separate ring oscillator (RO) architectures of 25 and 114 pieces consisting of three different chaotic maps and equal-length inverters. The statistical qualifications of the random numbers obtained from HRNG for each scenario are verified by NIST 800-22 tests. Also, for each scenario, the design parameters of the generator are examined and the hardware performances and non-periodicity analyses of the chaotic maps are performed. Based on the obtained results, it is demonstrated that the HRNG based on non-periodic sampling can be used for cryptographic purposes.
机译：在这项研究中，给出了基于数字设计技术的混合随机数发生器（HRNG）的FPGA实现。环形振荡器（RO）用作HRNG的噪声源，并且通过采样在振荡器上形成的抖动信号来获得真正的随机性。仅使用抖动作为真正随机性来源的随机数发生器的统计质量和可靠性通常在密码上是不够的。因此，有益于一维离散时间混沌图，例如二次图，逻辑图和伯努利移位图，以使HRNG满足这些密码要求。与文献中的许多研究相比，从强大的熵源的混沌系统中获得的非周期性信号被用来代替周期性信号来采样系统中的抖动信号。根据混沌系统的用途，可以获得不需要后处理技术且易于应用于数字设备的高生成器模型的输出比特率和可靠性。该混合系统在总共六个不同的场景中针对25个和114个分别由三个不同的混沌图和相等长度的反相器组成的两个单独的环形振荡器（RO）架构进行了测试。通过NIST 800-22测试验证了从每种情况下从HRNG获得的随机数的统计资格。此外，对于每种情况，都将检查生成器的设计参数，并执行混沌映射的硬件性能和非周期性分析。基于所获得的结果，证明了基于非周期性采样的HRNG可以用于加密目的。

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