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首页> 外文期刊>Arabian Journal for Science and Engineering. Section A, Sciences >A Highly Flexible Architecture for Morphological Gradient Processing Implemented on FPGA
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A Highly Flexible Architecture for Morphological Gradient Processing Implemented on FPGA

机译：在FPGA上实现的高度灵活的形态学梯度处理架构

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摘要

Nowadays, image processing algorithms present essential components of advanced systems in industrial, robotic and medicalapplications. Inmost cases, there are high requirements for reduced delays and optimal processing performances.Mathematicalmorphological operations are one of the most popular and powerful tools used in image processing offering high-levelperformance operations at low design complexity. However, mathematical morphology is based on repetitive calculations fora wide range of data, resulting in high execution time and memory requirement. Hence, hardware acceleration presents oneof the most appropriate solutions to overcome this limitation. In this paper, we propose an efficient hardware architectureaiming to increase performances of morphological gradient computation for grayscale images. The architecture exploits bothintra-level and inter-level parallelisms to speed up calculations. In addition, it processes data on stream which decreasesmemory utilization. The architecture allows extracting the standard edge gradient as well as the external and internal edgegradients at the desired magnitude and thickness level. Unlike most of existing works, the proposed architecture supportsreconfigurable shapes and sizes of structuring elements. It is successfully implemented on FPGA. The proposed architecturecan process data at a throughput of 356 Mpx/s. Accordingly, a high frame rate for moderate size of structuring elements andhigh image resolution is achieved.
机译：如今，图像处理算法是工业，机器人和医疗应用中高级系统的基本组成部分。在大多数情况下，对减少延迟和优化处理性能有很高的要求。数学形态学运算是图像处理中使用最广泛，功能最强大的工具之一，可以以较低的设计复杂度提供高水平的运算。但是，数学形态学是基于对大量数据的重复计算，从而导致执行时间和内存需求较高。因此，硬件加速是克服此限制的最合适的解决方案之一。在本文中，我们提出了一种有效的硬件架构，旨在提高灰度图像形态梯度计算的性能。该体系结构同时利用了层内和层间并行性来加快计算速度。此外，它还处理流中的数据，从而降低了内存利用率。该架构允许提取标准边缘梯度以及所需幅度和厚度级别的外部和内部边缘梯度。与大多数现有作品不同，该提议的体系结构支持可重新配置的形状和大小的结构元素。它已在FPGA上成功实现。所提出的体系结构可以以356 Mpx / s的吞吐量处理数据。因此，实现了用于中等大小的结构元件的高帧速率和高图像分辨率。

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