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首页> 外文期刊>IEEE Transactions on Broadcasting >A Low-Complexity Hardware Implementation of Compressed Sensing-Based Channel Estimation for ISDB-T System
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A Low-Complexity Hardware Implementation of Compressed Sensing-Based Channel Estimation for ISDB-T System

机译：基于压缩感知的ISDB-T系统信道估计的低复杂度硬件实现

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摘要

Compressed sensing (CS) is one of the hottest research topics in the sparse signal reconstruction problem. But CS implementation has a drawback of high computational complexity due to calculation between large size of matrices. In this paper, we will propose a low-complexity CS hardware realization for channel estimation in the integrated services digital broadcasting-terrestrial (ISDB-T) system using several optimization methods to reduce the implementation complexity of CS usage. Since the ISDB-T is based on orthogonal frequency division and multiplexing system, the measurement matrix of CS computation is a truncated discrete Fourier transform (DFT) matrix. We can exploit the symmetrical property of this DFT matrix to significantly reduce its multiplication complexity and random access memory usage. To achieve fast reconstruction period, this paper also provides a hardware architecture for the proposed method and its realization in field programmable gate array. The simulation results show that the proposed methods can achieve lower complexity CS-based channel estimation with almost the identical system performance with the conventional method. Moreover, the realized hardware can achieve the fastest execution time compare to that of other existing methods.
机译：压缩感知（CS）是稀疏信号重建问题中最热门的研究主题之一。但是由于大尺寸矩阵之间的计算，CS实现具有计算复杂度高的缺点。在本文中，我们将提出一种低复杂度的CS硬件实现，用于在综合业务数字地面广播（ISDB-T）系统中使用几种优化方法来降低CS使用的实现复杂性，以进行信道估计。由于ISDB-T基于正交频分复用系统，因此CS计算的测量矩阵为截断离散傅里叶变换（DFT）矩阵。我们可以利用此DFT矩阵的对称属性来显着降低其乘法复杂度和随机存取存储器的使用。为了实现快速的重构周期，本文还为该方法提供了一种硬件架构，并在现场可编程门阵列中实现。仿真结果表明，所提出的方法可以实现较低复杂度的基于CS的信道估计，并且系统性能几乎与传统方法相同。而且，与其他现有方法相比，所实现的硬件可以实现最快的执行时间。

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